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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC9RS08KA2 датащи(PDF) 65 Page - Freescale Semiconductor, Inc |
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SC9RS08KA2 датащи(HTML) 65 Page - Freescale Semiconductor, Inc |
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65 / 134 page  Chapter 8 Central Processor Unit (RS08CPUV1) SC9RS08KA2 Series Data Sheet, Rev. 1 Freescale Semiconductor 65 8.5 Summary Instruction Table Instruction Set Summary Nomenclature The nomenclature listed here is used in the instruction descriptions in Table 8-1 through Table 8-2. Operators ( ) = Contents of register or memory location shown inside parentheses ← = Is loaded with (read: “gets”) ⇔ = Exchange with & = Boolean AND | = Boolean OR ⊕ = Boolean exclusive-OR : = Concatenate +=Add CPU registers A = Accumulator CCR = Condition code register PC = Program counter PCH = Program counter, higher order (most significant) six bits PCL = Program counter, lower order (least significant) eight bits SPC = Shadow program counter SPCH = Shadow program counter, higher order (most significant) six bits SPCL = Shadow program counter, lower order (least significant) eight bits Memory and addressing M= A memory location or absolute data, depending on addressing mode rel = The relative offset, which is the two’s complement number stored in the last byte of machine code corresponding to a branch instruction X= Pseudo index register, memory location $000F ,X or D[X] = Memory location $000E pointing to the memory location defined by the pseudo index register (location $000F) Condition code register (CCR) bits Z = Zero indicator C = Carry/borrow CCR activity notation – = Bit not affected 0 = Bit forced to 0 1 = Bit forced to 1 = Bit set or cleared according to results of operation U = Undefined after the operation Machine coding notation |
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