AD9522-5SLASHPCBZ datasheet(21/76 Pages) AD

номер детали	AD9522-5/PCBZ

подробное описание детали	12 LVDS/24 CMOS Output Clock Generator

PDF	76 Pages

Scroll/Zoom	100%

производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

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21 / 76 page

AD9522-5

Rev. 0 | Page 21 of 76

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

2pF

10pF

20pF

600

500

400

300

200

100

FREQUENCY (MHz)

Figure 18. CMOS Output Swing vs. Frequency and Capacitive Load

–100

–110

–120

–130

–140

–150

–160

100

100M

10M

100k

10k

FREQUENCY (Hz)

Figure 19. Additive (Residual) Phase Noise,

CLK-to-LVDS @ 245.76 MHz, Divide-by-1

–100

–110

–120

–130

–140

–160

–150

100

100M

10M

100k

10k

FREQUENCY (Hz)

Figure 20. Additive (Residual) Phase Noise,

CLK-to-LVDS @ 200 MHz, Divide-by-5

–100

–110

–120

–130

–140

–150

100

100M

10M

100k

10k

FREQUENCY (Hz)

Figure 21. Additive (Residual) Phase Noise,

CLK-to-LVDS @ 800 MHz, Divide-by-1

–110

–120

–130

–140

–150

–170

–160

100

100M

10M

100k

10k

FREQUENCY (Hz)

Figure 22. Additive (Residual) Phase Noise,

CLK-to-CMOS @ 50 MHz, Divide-by-20

–100

–110

–120

–130

–140

–150

–160

100

100M

10M

100k

10k

FREQUENCY (Hz)

Figure 23. Additive (Residual) Phase Noise,

CLK-to-CMOS @ 250 MHz, Divide-by-4

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