SH7014 datasheet(95/754 Pages) RENESAS

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5. Exception Processing

Rev.5.00 Sep. 27, 2007 Page 61 of 716

REJ09B0398-0500

5.1.3

Exception Processing Vector Table

Before exception processing begins running, the exception processing vector table must be set in

memory. The exception processing vector table stores the start addresses of exception service

routines. (The reset exception processing table holds the initial values of PC and SP.)

All exception sources are given different vector numbers and vector table address offsets, from

which the vector table addresses are calculated. During exception processing, the start addresses of

the exception service routines are fetched from the exception processing vector table, which

indicated by this vector table address.

Table 5.3 shows the vector numbers and vector table address offsets. Table 5.4 shows how vector

table addresses are calculated.

Table 5.3

Exception Processing Vector Table

Exception Sources

Vector

Numbers

Vector Table Address Offset

Power-on reset

H'00000000 to H'00000003

H'00000004 to H'00000007

(Reserved by system)

H'00000008 to H'0000000B

(Reserved by system)

H'0000000C to H'0000000F

General illegal instruction

H'00000010 to H'00000013

(Reserved by system)

H'00000014 to H'00000017

Slot illegal instruction

H'00000018 to H'0000001B

(Reserved by system)

H'0000001C to H'0000001F

(Reserved by system)

H'00000020 to H'00000023

CPU address error

H'00000024 to H'00000027

DMAC address error

H'00000028 to H'0000002B

Interrupts

NMI

H'0000002C to H'0000002F

User break

H'00000030 to H'00000033

(Reserved by system)

H'00000034 to H'00000037

H'0000007C to H'0000007F

Trap instruction (user vector)

H'00000080 to H'00000083

H'000000FC to H'000000FF

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