SH7014 datasheet(64/754 Pages) RENESAS

номер детали	SH7014

подробное описание детали	32-Bit RISC Microcomputer

PDF	754 Pages

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2. CPU

Rev.5.00 Sep. 27, 2007 Page 30 of 716

REJ09B0398-0500

2.3.3

Instruction Format

Table 2.9 lists the instruction formats for the source operand and the destination operand. The

meaning of the operand depends on the instruction code. The symbols are used as follows:

• xxxx: Instruction code

• mmmm: Source register

• nnnn: Destination register

• iiii: Immediate data

• dddd: Displacement

Table 2.9

Instruction Formats

Source

Operand

Destination

Operand

Example

0 format

xxxx

⎯

NOP

⎯

nnnn: Direct

MOVT

n format

xxxx

nnnn

Control register

or system

nnnn: Direct

STS

MACH,Rn

Control register

or system

nnnn: Indirect pre-

decrement register

STC.L

SR,@-Rn

mmmm: Direct

Control register or

system register

LDC

Rm,SR

m format

xxxx

mmmm

xxxx

mmmm: Indirect

post-increment

Control register or

system register

LDC.L

@Rm+,SR

mmmm: Direct

⎯

JMP

@Rm

mmmm: PC

relative using Rm

⎯

BRAF

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