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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SH7014 датащи(PDF) 56 Page - Renesas Technology Corp |
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SH7014 датащи(HTML) 56 Page - Renesas Technology Corp |
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56 / 754 page  2. CPU Rev.5.00 Sep. 27, 2007 Page 22 of 716 REJ09B0398-0500 2.2 Data Formats 2.2.1 Data Format in Registers Register operands are always longwords (32 bits). When the memory operand is only a byte (8 bits) or a word (16 bits), it is sign-extended into a longword when loaded into a register (figure 2.4). 31 0 Longword Figure 2.4 Longword Operand 2.2.2 Data Format in Memory Memory data formats are classified into bytes, words, and longwords. Byte data can be accessed from any address, but an address error will occur if you try to access word data starting from an address other than 2n or longword data starting from an address other than 4n. In such cases, the data accessed cannot be guaranteed. The hardware stack area, referred to by the hardware stack pointer (SP, R15), uses only longword data starting from address 4n because this area holds the program counter and status register (figure 2.5). 31 0 15 23 7 Byte Byte Byte Byte Word Word Address 2n Address 4n Longword Address m Address m + 2 Address m + 1 Address m + 3 Figure 2.5 Byte, Word, and Longword Alignment 2.2.3 Immediate Data Format Byte (8-bit) immediate data resides in an instruction code. Immediate data accessed by the MOV, ADD, and CMP/EQ instructions is sign-extended and handled in registers as longword data. Immediate data accessed by the TST, AND, OR, and XOR instructions is zero-extended and handled as longword data. Consequently, AND instructions with immediate data always clear the upper 24 bits of the destination register. |
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