M66596FP datasheet(117/131 Pages) RENESAS

117 / 131 page

M66596FP/WG

rev .1.00

2006.3.14

page 117 of 127

4.9.4

DMA access timing(cycle steal transfer, when a multiplex bus is set)

4.9.4.1 DMA cycle steal transfer write timing (CPU multiplex bus setting: DFORM=000)

tdis (CTRLH - Dreq)

twh (Dreq)

ten (CTRL - Dreq) 19

DREQi_N

(i=0,1)

tsu (DEND)

th (DEND)

DENDi_N

(i=0,1)

DENDi_N determination

AD6-AD1 /

D15-D0

CS_N

WR1_N,

WR0_N

Note 4-1

Address

determination

ALE

tsu (A - ALE)

th (A - ALE)

tsu (D)

th (D) 44

tw (ALE)

tw (CTRL) 39

trec (ALE)

Note 4-3

tdwr (ALE - CTRL)

Address

determination

Data determination

4.9.4.2 DMA cycle steal transfer read timing (CPU multiplex bus setting: DFORM=000)

DREQi_N

(i=0,1)

tdis (CTRL - Dreq)

twh (Dreq) 20

ten (CTRL - Dreq)

A6-A1 /

D15-A0

CS_N

RD_N

Note 4-2

Address

determination

ALE

tsu (A - ALE) th (A - ALE)

tw (ALE)

tdwr (ALE - CTRL)

ten (CTRL - D)

ta (CTRL - D)

tv (CTRL - D)

tdis (CTRL - D) 6

twr (CTRL) 42

trec (ALE) 38

Note 4-3

DENDi _N

(i=0,1)

ta (CTRL - DendV) 11

tv (CTRL - DendV)

Data determination

Address

determination

DENDi_N determination

Note 4-4

Note 4-1: The control signal when writing data is a combination of CS_N, WR0_N, and WR1_N.

Note 4-2: The control signal when reading data is a combination of CS_N and RD_N.

Note 4-3: RD_N, WR0_N and WR1_N should not be timed to fall at the same time that CS_N is rising. Similarly, CS_N

should not be timed to fall (or rise) at the same timing that RD_N or WR0_N and WR1_N are rising. In the

instances noted above, an interval of at least 10 ns must be left open.

Note 4-4: When the receipt data is one byte, the DEND determined time is "(24)td(DREQ-DendV)".

M66596FP датащи(PDF) 117 Page - Renesas Technology Corp

M66596FP датащи(HTML) 117 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL