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RIVA128 датащи(PDF) 17 Page - STMicroelectronics |
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RIVA128 датащи(HTML) 17 Page - STMicroelectronics |
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17 / 77 page ![]() 128-BIT 3D MULTIMEDIA ACCELERATOR RIVA 128 17/77 Figure 3. Basic PCI transaction on AGP An example of a PCI transaction occurring between an AGP command cycle and return of data is shown in Figure 4. This shows the smallest number of cycles during which an AGP request can be enqueued, a PCI transaction performed and AGP read data returned. Figure 4. PCI transaction occurring between AGP request and data bus cmd data_pci address BE[3:0]# 111 111 xxx xxx xxx xxx PCICLK PCIFRAME# PCIAD[31:0] PCICBE[3:0]# PCIIRDY# PCITRDY# PCIDEVSEL# PCIREQ# PCIGNT# AGPST[2:0] 13 4 5 6 2 A9 111 xxx 111 111 xxx 111 address data D7 +1 C9 pci_cmd BE 0000 000 xxx 00x xxx xxx PCICLK AGPPIPE# PCIFRAME# PCIAD[31:0] PCICBE# PCIIRDY# PCITRDY# PCIDEVSEL# PCIAGPRBF# PCIREQ# PCIGNT# AGPST[2:0] 12 3 4 5 6 7 8 9 10 |
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