301020013 datasheet(59/109 Pages) AMSOSRAM

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DS000444 • v5-00 • 2025-Aug-29

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Information:

Please note that in the above image the component DAC is optional.

Table 31: Recommended values for capacitors and inductances

Component

Description

Nominal

value

Tolerance

Voltage range

Power decoupling capacitor, close to

each VDDx connector pin

Low ESR Ceramic

10 nF

±25%

>3.6 V

Power decoupling capacitor, placed

one time per power supply

Tantalum type

10 µF

±25%

>3.6 V

Power decoupling capacitor, placed

one time per power supply

Tantalum type

100 µF

±25%

>3.6 V

Power decoupling inductance

10 nH

±25%

Dimension according to

power consumption of

respective sensor

variation

Additional decoupling capacitor on the

outputs of Test_Mux(1)

100 nF

±25%

>3.6 V

(1) If the Test_Mux_# signals are accessible an additional capacitance should be placed in this signal and then by writing on

If added an external DAC, the circuit schematic to be used is shown in Figure 30. If the

Test_Mux_# signals are accessible, this option allows to set the ADC offset (black reference)

in more fine steps and possibly, with better temperature stability. In order to perform this

operation, the Test_Mux_# outputs should be connected and the value 0x0F should be written

to register 0x0A in all segments. Also, make sure the DAC output impedance is higher than

200 kΩ. On chip there is an 8-bit resolution DAC for this purpose, but an external DAC can

provide benefit if more fine adjustment steps are required.

For sensors with 3.5 μm pixel and dual line sensors, once there are individual SPI blocks, it is

recommended to connect a DAC for top (DAC1) and bottom (DAC2) side separately, though is

not mandatory. Once the individual DAC offsets are equalized over the external connection,

the black level can be adjusted by writing the same value to the registers on each segment.

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