STM32H533CE datasheet(196/231 Pages) STMICROELECTRONICS

196 / 231 page

Electrical characteristics

STM32H533xx

196/231

DS14539 Rev 1

SD/SDIO MMC card host interface (SDMMC) characteristics

Unless otherwise specified, the parameters given in Table 116 and Table 117 are derived

from tests performed under the ambient temperature, fPCLKx frequency and VDD supply

voltage summarized in Table 20, with the following configuration:

•

Output speed is set to OSPEEDRy[1:0] = 11

•

Capacitive load CL= 30 pF

•

Measurement points are done at CMOS levels: 0.5 VDD

•

I/O compensation cell activated

•

HSLV activated when VDD ≤ 2.7 V

Refer to Section 5.3.14 for more details on the input/output characteristics.

RDCP_DAT

Dedicated charging port resistance

across D+/D-

200

Ω

VLGC_HI

Logic high

2.0

3.6

VLGC_LOW

Logic low

0.8

VLGC

Logic threshold

0.8

2.0

VDAT_REF

Data detect voltage

0.25

0.4

VDP_SRC

D+ source voltage

0.5

0.7

VDM_SRC

D- source voltage

0.5

0.7

IDP_SINK

D+ sink current

175

μA

IDM_SINK

D- sink current

175

1. Specified by design - Not tested in production.

Table 116. Dynamic characteristics: SD/MMC characteristics, VDD = 2.7 to 3.6 V(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPP(2)

Clock frequency in data transfer mode

130/6

(3)

MHz

tW(CKL) Clock low time

fPP =52MHz

8.5

9.5

tW(CKH) Clock high time

8.5

9.5

CMD, D inputs (referenced to CK) in eMMC legacy/SDR/DDR and SD HS/SDR(4)/DDR(4) mode

tISU

Input setup time HS

tIH

Input hold time HS

tIDW(5)

Input valid window (variable window)

4.5

CMD, D outputs (referenced to CK) in eMMC legacy/SDR/DDR and SD HS/SDR(4)/DDR(4) mode

tOV

Output valid time HS

6.5

7/38(3)

tOH

Output hold time HS

3.5

Table 115. USB BCD DC electrical characteristics(1) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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