STM32H533CE datasheet(178/231 Pages) STMICROELECTRONICS

номер детали	STM32H533CE

подробное описание детали	Arm® Cortex®-M33 32-bit MCUTrustZone® FPU, 375 DMIPS 250 MHz, 512-Kbyte flash, 272-Kbyte RAM, cryptography

PDF	231 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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178 / 231 page

Electrical characteristics

STM32H533xx

178/231

DS14539 Rev 1

5.3.23

DAC characteristics

Table 93. DAC characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Analog supply voltage

1.8

3.3

3.6

VREF+

Positive reference voltage

1.80

VDDA

VREF-

Negative reference voltage

VSSA

Resistive load

DAC output buffer

Connected

to VSSA

kΩ

Connected

to VDDA

Output impedance

DAC output buffer OFF

10.3

RBON

Output impedance sample

and hold mode, output

buffer ON

DAC output buffer

VDD = 2.7 V

1.6

kΩ

VDD = 2.0 V

2.6

RBOFF

Output impedance sample

and hold mode, output

buffer OFF

DAC output buffer

OFF

VDD = 2.7 V

17.8

kΩ

VDD = 2.0 V

18.7

Capacitive load

DAC output buffer OFF

CSH

Sample and Hold mode

0.1

µF

VDAC_OUT

Voltage on DAC_OUT

output

DAC output buffer ON

0.2

VDDA

−0.2

DAC output buffer OFF

VREF+

tSETTLING

Settling time (full scale: for

a 12-bit code transition

between the lowest and

the highest input codes

when DAC_OUT reaches

the final value of ±0.5LSB,

±1LSB, ±2LSB, ±4LSB,

±8LSB)

Normal mode, DAC

output buffer ON,

CL ≤ 50 pF,

RL ≥ 5 ㏀

±0.5 LSB

2.05

µs

±1 LSB

1.97

2.87

±2 LSB

1.67

2.84

±4 LSB

1.66

2.78

±8 LSB

1.65

2.7

Normal mode, DAC output buffer

OFF, ±1LSB CL= 10 pF

-1.7

tWAKEUP(2)

Wake-up time from off

state (setting the ENx bit in

the DAC control register)

until the final value of

±1LSB is reached

Normal mode, DAC output buffer

ON, CL ≤ 50 pF, RL = 5 kΩ

-5

7.5

µs

Normal mode, DAC output buffer

OFF, CL ≤ 10 pF

-2

PSRR

DC VDDA supply rejection

ratio

Normal mode, DAC output buffer

ON, CL ≤ 50 pF, RL = 5 kΩ

--80

-28

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