PIC16F627A datasheet(101/180 Pages) MICROCHIP

101 / 180 page

DS40044D-page 99

PIC16F627A/628A/648A

14.2.6

RC OSCILLATOR

For

applications

where

precise

timing

not

requirement, the RC oscillator option is available. The

operation and functionality of the RC oscillator is

dependent upon a number of variables. The RC oscillator

frequency is a function of:

• Supply voltage

• Resistor (REXT) and capacitor (CEXT) values

• Operating temperature

The oscillator frequency will vary from unit-to-unit due

to normal process parameter variation. The difference

in lead frame capacitance between package types will

also affect the oscillation frequency, especially for low

CEXT values. The user also needs to account for the

tolerance of the external R and C components.

Figure 14-5 shows how the R/C combination is

connected.

FIGURE 14-5:

RC OSCILLATOR MODE

The RC Oscillator mode has two options that control

the unused OSC2 pin. The first allows it to be used as

a general purpose I/O port. The other configures the

pin as an output providing the FOSC signal (internal

clock divided by 4) for test or external synchronization

purposes.

14.2.7

CLKOUT

The PIC16F627A/628A/648A can be configured to

provide a clock out signal by programming the

Configuration Word. The oscillator frequency, divided

by 4 can be used for test purposes or to synchronize

other logic.

14.2.8

SPECIAL FEATURE: DUAL-SPEED

OSCILLATOR MODES

A software programmable dual-speed oscillator mode

is provided when the PIC16F627A/628A/648A is

configured in the INTOSC oscillator mode. This feature

allows users to dynamically toggle the oscillator speed

between 4 MHz and 48 kHz nominal in the INTOSC

mode. Applications that require low-current power

savings, but cannot tolerate putting the part into Sleep,

may use this mode.

There is a time delay associated with the transition

between fast and slow oscillator speeds. This oscillator

speed transition delay consists of two existing clock

pulses and eight new speed clock pulses. During this

clock speed transition delay, the System Clock is halted

causing the processor to be frozen in time. During this

delay, the program counter and the CLKOUT stop.

The OSCF bit in the PCON register is used to control

Dual Speed mode. See Section 4.2.2.6 “PCON

14.3

Reset

The PIC16F627A/628A/648A differentiates between

various kinds of Reset:

Power-on Reset (POR)

MCLR Reset during normal operation

MCLR Reset during Sleep

WDT Reset (normal operation)

WDT wake-up (Sleep)

Brown-out Reset (BOR)

Some registers are not affected in any Reset condition;

their status is unknown on POR and unchanged in any

other Reset. Most other registers are reset to a “Reset

state” on Power-on Reset, Brown-out Reset, MCLR

Reset, WDT Reset and MCLR Reset during Sleep.

They are not affected by a WDT wake-up, since this is

viewed as the resumption of normal operation. TO and

PD bits are set or cleared differently in different Reset

situations as indicated in Table 14-4. These bits are

used in software to determine the nature of the Reset.

See Table 14-7 for a full description of Reset states of

all registers.

A simplified block diagram of the on-chip Reset circuit

is shown in Figure 14-6.

The MCLR Reset path has a noise filter to detect and

ignore small pulses. See Table 17-7 for pulse width

specification.

CEXT

VDD

REXT

VSS

PIC16F627A/628A/648A

FOSC/4

Internal

Clock

CLKIN

RA7/OSC1/

RA6/OSC2/CLKOUT

Recommended Values: 3 k

Ω ≤ REXT ≤ 100 kΩ (VDD ≥ 3.0V)

10 k

Ω≤REXT ≤100 kΩ(VDD<3.0V)

CEXT

> 20 pF

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