PIC16F627A datasheet(67/180 Pages) MICROCHIP

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DS40044D-page 65

PIC16F627A/628A/648A

10.6

Comparator Interrupts

The comparator interrupt flag is set whenever there is

a change in the output value of either comparator.

Software will need to maintain information about the

status of the output bits, as read from CMCON<7:6>, to

determine the actual change that has occurred. The

CMIF bit, PIR1<6>, is the comparator interrupt flag.

The CMIF bit must be reset by clearing ‘0’. Since it is

also possible to write a ‘1’ to this register, a simulated

interrupt may be initiated.

The

CMIE

bit

(PIE1<6>)

and

the

PEIE

bit

(INTCON<6>) must be set to enable the interrupt. In

addition, the GIE bit must also be set. If any of these

bits are clear, the interrupt is not enabled, though the

CMIF bit will still be set if an interrupt condition occurs.

The user, in the interrupt service routine, can clear the

interrupt in the following manner:

Any write or read of CMCON. This will end the

mismatch condition.

Clear flag bit CMIF.

A mismatch condition will continue to set flag bit CMIF.

Reading CMCON will end the mismatch condition and

allow flag bit CMIF to be cleared.

10.7

Comparator Operation During

Sleep

When a comparator is active and the device is placed

in Sleep mode, the comparator remains active and the

interrupt is functional if enabled. This interrupt will

wake-up the device from Sleep mode when enabled.

While the comparator is powered-up, higher Sleep

currents than shown in the power-down current

specification will occur. Each comparator that is

operational will consume additional current as shown in

the comparator specifications. To minimize power

consumption while in Sleep mode, turn off the

comparators, CM<2:0> = 111, before entering Sleep. If

the device wakes up from Sleep, the contents of the

CMCON register are not affected.

10.8

Effects of a Reset

A device Reset forces the CMCON register to its Reset

state. This forces the Comparator module to be in the

comparator Reset mode, CM<2:0> = 000. This ensures

that all potential inputs are analog inputs. Device current

is minimized when analog inputs are present at Reset

time. The comparators will be powered-down during the

Reset interval.

10.9

Analog Input Connection

Considerations

A simplified circuit for an analog input is shown in

Figure 10-4. Since the analog pins are connected to a

digital output, they have reverse biased diodes to VDD

and VSS. The analog input therefore, must be between

VSS and VDD. If the input voltage deviates from this

range by more than 0.6V in either direction, one of the

diodes is forward biased and a latch-up may occur. A

maximum

source

impedance

10 k

recommended for the analog sources. Any external

component connected to an analog input pin, such as

a capacitor or a Zener diode, should have very little

leakage current.

Note:

If a change in the CMCON register

(C1OUT or C2OUT) should occur when a

read operation is being executed (start of

the Q2 cycle), then the CMIF (PIR1<6>)

interrupt flag may not get set.

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