PIC16F627A datasheet(98/180 Pages) MICROCHIP

98 / 180 page

PIC16F627A/628A/648A

DS40044D-page 96

CONFIG – CONFIGURATION WORD REGISTER

—

—CPD

LVP

BOREN

MCLRE

FOSC2

PWRTE

WDTE

F0SC1

F0SC0

bit 13

bit 0

bit 13:

CP: Flash Program Memory Code Protection bit(2)

(PIC16F648A)

= Code protection off

= 0000h to 0FFFh code-protected

(PIC16F628A)

= Code protection off

= 0000h to 07FFh code-protected

(PIC16F627A)

= Code protection off

= 0000h to 03FFh code-protected

bit 12-9:

Unimplemented: Read as ‘0’

bit 8:

CPD: Data Code Protection bit(3)

= Data memory code protection off

= Data memory code-protected

bit 7:

LVP: Low-Voltage Programming Enable bit

= RB4/PGM pin has PGM function, low-voltage programming enabled

= RB4/PGM is digital I/O, HV on MCLR must be used for programming

bit 6:

BOREN: Brown-out Reset Enable bit (1)

= BOR Reset enabled

= BOR Reset disabled

bit 5:

MCLRE: RA5/MCLR/VPP Pin Function Select bit

= RA5/MCLR/VPP pin function is MCLR

= RA5/MCLR/VPP pin function is digital Input, MCLR internally tied to VDD

bit 3:

PWRTE: Power-up Timer Enable bit (1)

= PWRT disabled

= PWRT enabled

bit 2:

WDTE: Watchdog Timer Enable bit

= WDT enabled

= WDT disabled

bit 4, 1-0:

FOSC<2:0>: Oscillator Selection bits(4)

111

= RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN

110

= RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN

101

= INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN

100

= INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN

011

= EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN

010

= HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN

001

= XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN

000

= LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN

Note

Enabling Brown-out Reset does not automatically enable the Power-up Timer (PWRT) the way it does on the

PIC16F627/628 devices.

The code protection scheme has changed from the code protection scheme used on the PIC16F627/628 devices. The

entire Flash program memory needs to be bulk erased to set the CP bit, turning the code protection off. See

“PIC16F627A/628A/648A EEPROM Memory Programming Specification” (DS41196) for details.

The entire data EEPROM needs to be bulk erased to set the CPD bit, turning the code protection off. See “PIC16F627A/

628A/648A EEPROM Memory Programming Specification” (DS41196) for details.

When MCLR is asserted in INTOSC mode, the internal clock oscillator is disabled.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = bit is set

‘0’ = bit is cleared

x = bit is unknown

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