MPC8280 datasheet(132/1386 Pages) FREESCALE

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G2_LE Core

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

2-16

Freescale Semiconductor

Effective address computations for both data and instruction accesses use 32-bit unsigned binary

arithmetic. A carry from bit 0 is ignored in 32-bit implementations.

In addition to the functionality of the MPC603e, the MPC8280 has additional hardware support for

misaligned little-endian accesses. Except for string/multiple load and store instructions, little-endian

load/store accesses not on a word boundary generate exceptions under the same circumstances as

big-endian requests.

2.3.2.2

PowerPC Instruction Set

The PowerPC instructions are divided into the following categories:

•

Integer instructions—These include arithmetic and logical instructions.

— Integer arithmetic

— Integer compare

— Integer logical

— Integer rotate and shift

•

Floating-point instructions—These include floating-point computational instructions, as well as

instructions that affect the FPSCR.

— Floating-point arithmetic

— Floating-point multiply/add

— Floating-point rounding and conversion

— Floating-point compare

— Floating-point status and control

•

Load/store instructions—These include integer and floating-point load and store instructions.

— Integer load and store

— Integer load and store with byte reverse

— Integer load and store string/multiple

— Floating-point load and store

•

Flow control instructions—These include branching instructions, condition register logical

instructions, trap instructions, and other synchronizing instructions that affect the instruction flow.

— Branch and trap

— Condition register logical

— Primitives used to construct atomic memory operations (lwarx and stwcx.)

— Synchronize

•

Processor control instructions—These instructions are used for synchronizing memory accesses

and management of caches, TLBs, and the segment registers.

— Move to/from SPR

— Move to/from MSR

— Instruction synchronize

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