PM7366-PI datasheet(175/286 Pages) PMC

175 / 286 page

RELEASED

PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

162

Bit

Type

Function

Default

Bit 31 to

Bit 16

Unused

XXXXH

Bit 15

R/W

TQB[31]

Bit 14

R/W

TQB[30]

Bit 13

R/W

TQB[29]

Bit 12

R/W

TQB[28]

Bit 11

R/W

TQB[27]

Bit 10

R/W

TQB[26]

Bit 9

R/W

TQB[25]

Bit 8

R/W

TQB[24]

Bit 7

R/W

TQB[23]

Bit 6

R/W

TQB[22]

Bit 5

R/W

TQB[21]

Bit 4

R/W

TQB[20]

Bit 3

R/W

TQB[19]

Bit 2

R/W

TQB[18]

Bit 1

R/W

TQB[17]

Bit 0

R/W

TQB[16]

This register provides the more significant word of the Transmit Queue Base address. The

contents of the companion TMAC Transmit Descriptor Table Base LSW register is held in a

holding register until a write access to this register, at which point, the base address of the

transmit queue is updated.

Note

This register is not byte addressable. Writing to this register modifies all the bits in the register.

Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all

four byte enables are negated, no access is made to this register.

TQB[31:0]:

The transmit queue base bits (TQB[31:0]) provides the base address of the Transmit

Descriptor Reference Free and Transmit Descriptor Reference Ready queue in PCI host

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