FALXT972MCCA4 datasheet(23/92 Pages) INTEL

номер детали	FALXT972MCCA4

подробное описание детали	Single-Port 10/100 Mbps PHY Transceiver

PDF	92 Pages

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производитель	INTEL [Intel Corporation]

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Intel

® LXT972M Single-Port 10/100 Mbps PHY Transceiver

Datasheet

Document Number: 302875-005

Revision Date: 27-Oct-2005

5.2

Network Media / Protocol Support

This section includes the following:

• Section 5.2.1, “10/100 Network Interface”

• Section 5.2.2, “MII Data Interface”

• Section 5.2.3, “Configuration Management Interface”

The LXT972M Transceiver supports both 10BASE-T and 100BASE-TX Ethernet over twisted-

pair.

5.2.1

10/100 Network Interface

The network interface port consists of two differential signal pairs. For specific pin assignments,

see Chapter 4.0, “Signal Descriptions for Intel® LXT972M Transceiver”.

The LXT972M Transceiver output drivers can generate one of the following outputs:

• 100BASE-TX

• 10BASE-T

When not transmitting data, the LXT972M Transceiver generates IEEE 802.3-compliant link

pulses or idle code. Depending on the mode selected, input signals are decoded as one of the

following:

When not transmitting data, the LXT972M Transceiver generates IEEE 802.3-compliant link

pulses or idle code. Depending on the mode selected, input signals are decoded as one of the

following:

• 100BASE-TX

• 10BASE-T

Auto-negotiation/parallel detection or manual control is used to determine the speed of this

interface.

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