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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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FALXT972MCCA4 датащи(PDF) 17 Page - Intel Corporation |
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FALXT972MCCA4 датащи(HTML) 17 Page - Intel Corporation |
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17 / 92 page  Intel ® LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet 17 Document Number: 302875-005 Revision Date: 27-Oct-2005 Table 5 lists signal descriptions of the LXT972M Transceiver MII controller interface pins. Table 6 lists signal descriptions of the LXT972M Transceiver network interface pins. Table 7 lists signal descriptions of the LXT972M Transceiver standard bus and interface signals. Table 5. Intel ® LXT972M Transceiver MII Controller Interface Signal Descriptions LQFP Pin# Symbol Type Signal Description 32 MDC I Management Data Clock. Clock for the MDIO serial data channel. Maximum frequency is 8 MHz. 31 MDIO I/O Management Data Input/Output. Bidirectional serial data channel for PHY/STA communication. Table 6. Intel ® LXT972M Transceiver Network Interface Signal Descriptions LQFP Pin# Symbol Type Signal Description 14 15 TPOP TPON AO Twisted-Pair Outputs, Positive and Negative. During 100BASE-TX or 10BASE-T operation, TPOP/N pins drive IEEE 802.3 compliant pulses onto the line. 17 18 TPIP TPIN AI Twisted-Pair Inputs, Positive and Negative. During 100BASE-TX or 10BASE-T operation, TPIP/N pins receive differential 100BASE-TX or 10BASE-T signals from the line. Table 7. Intel® LXT972M Transceiver Standard Bus and Interface Signal Descriptions LQFP Pin# Symbol Type Signal Description 10 11 ADDR0 ADDR1 I Address. Set device address. |
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