FALXT972MCCA4 datasheet(16/92 Pages) INTEL

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Intel

® LXT972M Single-Port 10/100 Mbps PHY Transceiver

Datasheet

Document Number: 302875-005

Revision Date: 27-Oct-2005

Table 4 lists signal descriptions of the LXT972M Transceiver MII data interface pins.

Table 4.

Intel® LXT972M Transceiver MII Data Interface Signal Descriptions

LQFP

Pin#

Symbol

Type

Signal Description

TXD3

TXD2

TXD1

TXD0

Transmit Data.

TXD is a group of parallel data signals that are driven by the MAC.

TXD[3:0] transition synchronously with respect to TX_CLK.

TXD[0] is the least-significant bit.

TX_EN

Transmit Enable.

The MAC asserts this signal when it drives valid data on TXD.

This signal must be synchronized to TX_CLK.

TX_CLK

Transmit Clock.

TX_CLK is sourced by the PHY in both 10 and 100 Mbps

operations.

2.5 MHz for 10 Mbps operation

25 MHz for 100 Mbps operation.

RXD3

RXD2

RXD1

RXD0

Receive Data.

RXD is a group of parallel signals that transition synchronously with

respect to RX_CLK.

RXD[0] is the least-significant bit.

RX_DV

Receive Data Valid.

The LXT972M Transceiver asserts this signal when it drives valid

data on RXD.

This output is synchronous to RX_CLK.

RX_ER

Receive Error.

Signals a receive error condition has occurred.

This output is synchronous to RX_CLK.

RX_CLK

Receive Clock.

25 MHz for 100 Mbps operation.

2.5 MHz for 10 Mbps operation.

For details, see “Clock Requirements” on page 28 in Chapter 5.0,

“Functional Description”.

COL

Collision Detected.

The LXT972M Transceiver asserts this output when a collision is

detected.

This output remains High for the duration of the collision.

This signal is asynchronous and is inactive during full- duplex

operation.

CRS

Carrier Sense.

During half-duplex operation (Register bit 0.8 = 0), the LXT972M

Transceiver asserts this output when either transmitting or receiving

data packets.

During full-duplex operation (Register bit 0.8 = 1), CRS is asserted

only during receive.

CRS assertion is asynchronous with respect to RX_CLK. CRS is

de-asserted on loss of carrier, synchronous to RX_CLK.

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