XRT86VL34 datasheet(63/156 Pages) EXAR

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XRT86VL34

REV. V1.2.0

QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

TABLE 42: DATA LINK CONTROL REGISTER (DLCR2)

HEX ADDRESS: 0Xn143

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

SLC-96 Data Link

Enable

R/W

SLC®96 DataLink Enable

This bit permits the user to configure the channel to support the

transmission and reception of the “SLC-96 type” of data-link mes-

sage.

0 - Channel does not support the transmission and reception of

“SLC-96” type of data-link messages. Regular SF framing bits will

be transmitted.

1 - Channel supports the transmission and reception of the “SLC-

96” type of data-link messages.

NOTE: This bit is only active if the channel has been configured to

operate in either the SLC-96 or the ESF Framing formats.

MOS ABORT Disable

R/W

MOS ABORT Disable:

This bit permits the user to either enable or disable the “Automatic

MOS ABORT” feature within Transmit HDLC Controller # 2. If the

user enables this feature, then Transmit HDLC Controller block # 2

will automatically transmit the ABORT Sequence (e.g., a zero fol-

lowed by a string of 7 consecutive “1s”) whenever it abruptly transi-

tions from transmitting a MOS type of message, to transmitting a

BOS type of message.

If the user disables this feature, then the Transmit HDLC Controller

Block # 2 will NOT transmit the ABORT sequence, whenever it

abruptly transitions from transmitting a MOS-type of message to

transmitting a BOS-type of message.

0 - Enables the “Automatic MOS Abort” feature

1 - Disables the “Automatic MOS Abort” feature

Rx_FCS_DIS

R/W

Receive Frame Check Sequence (FCS) Verification Enable/Dis-

able

This bit permits the user to configure the Receive HDLC Controller

Block # 2 to compute and verify the FCS value within each incoming

LAPD message frame.

0 - Enables FCS Verification

1 - Disables FCS Verification

AutoRx

R/W

Auto Receive LAPD Message

This bit configures the Receive HDLC Controller Block #2 to discard

any incoming BOS or LAPD Message frame that exactly match

which is currently stored in the Receive HDLC1 buffer.

0 = Disables this “AUTO DISCARD” feature

1 = Enables this “AUTO DISCARD” feature.

Tx_ABORT

R/W

Transmit ABORT

This bit configures the Transmit HDLC Controller Block # 2 to trans-

mit an ABORT sequence (string of 7 or more consecutive 1’s) to the

Remote terminal.

0 - Configures the Transmit HDLC Controller Block # 2 to function

normally (e.g., not transmit the ABORT sequence).

1 - Configures the Transmit HDLC Controller block # 2 to transmit

the ABORT Sequence.

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