XRT86VL34 datasheet(28/156 Pages) EXAR

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XRT86VL34

QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

REV. V1.2.0

TABLE 9: TRANSMIT SIGNALING AND DATA LINK SELECT REGISTER (TSDLSR)

HEX ADDRESS:0Xn10A

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

Reserved

5-4

TxDLBW[1:0]

R/W

Transmit Data Link Bandwidth[1:0]

These two bits are used to select the bandwidth for data link mes-

sage transmission. Data Link messages can be transmitted at a

4kHz rate or at a 2kHz rate on odd or even framing bits depending on

the configuration of these three bits. The table below specifies the

four different configurations.

NOTE: This bit only applies to T1 ESF framing format. For SLC96

and N framing formats, FDL is a 4kHz data link channel. For

T1DM, FDL is a 8kHz data link channel.

3-2

TxDE[1:0]

R/W

Transmit D/E TimeSlot Source Select[1:0]:

These two bits specify the source for transmit D/E time slots. The

table below shows the different sources from which D/E time slots

can be inserted.

TXDLBW[1:0]

TRANSMIT DATA LINK BANDWIDTH SELECTED

Data link bits are inserted in every frame. Facility

Data Link Bits (FDL) is a 4kHz data link channel.

Data link bits are inserted in every other frame.

Facility Data Link Bits (FDL) is a 2kHz data link

channel carried by odd framing bits (Frames

1,5,9.....)

Data link bits are inserted in every other frame.

Facility Data Link Bits (FDL) is a 2kHz data link

channel carried by even framing bits (Frames

3,7,11.....)

Reserved

TXDE[1:0]

SOURCE FOR TRANSMIT D/E TIMESLOTS

TxSER_n input pin - The D/E time slots are

inserted from the transmit serial data input pin

(TxSER_n) pin.

Transmit LAPD Controller - The D/E time slots are

inserted from LAPD Controller.

Reserved

TxFRTD_n - The D/E time slots are inserted from

the transmit fractional input pin.

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