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AD9516-2/PCBZ датащи(PDF) 36 Page - Analog Devices |
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AD9516-2/PCBZ датащи(HTML) 36 Page - Analog Devices |
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36 / 84 page ![]() AD9516-2 Rev. 0 | Page 36 of 84 When A = 0, the divide is a fixed divide of P = 2, 4, 8, 16, or 32, in which case the previous equation also applies. By using combinations of DM and FD modes, the AD9516 can achieve values of N all the way down to N = 1. Table 28 shows how a 10 MHz reference input may be locked to any integer multiple of N. Note that the same value of N may be derived in different ways, as illustrated by the case of N = 12. The user may choose a fixed divide mode P = 2 with B = 6, or use the dual modulus mode 2/3 with A = 0, B = 6, or use the dual modulus mode 4/5 with A = 0, B = 3. A and B Counters The AD9516 B counter can be bypassed (B = 1). This B counter bypass mode is only valid when using the prescaler in FD mode. When A = 0, the divide is a fixed divide of P = 2, 4, 8, 16, or 32. Unlike the R-counter, an A = 0 is actually a zero. The B counter must be ≥3 or bypassed. The maximum input frequency to the A/B counter is reflected in the maximum prescaler output frequency (~300 MHz) specified in Table 2. This is the prescaler input frequency (VCO or CLK) divided by P. Although manual reset is not normally required, the A/B counters have their own reset bit. A and B counters can be reset using the shared reset bit of the R, A, and B counters. They may also be reset through a SYNC operation. R, A, and B Counters: SYNC Pin Reset The R, A and B counters may also be reset simultaneously through the SYNC pin. This function is controlled by 0x19<7:6> (see Table 53). The SYNC pin reset is disabled by default. R and N Divider Delays Both the R and N dividers feature a programmable delay cell. These delays may be enabled to allow adjustment of the phase relationship between the PLL reference clock and the VCO or CLK. Each delay is controlled by three bits. The total delay range is about 1 ns. See 0x19 in Table 53. Table 28. How a 10 MHz Reference Input May Be Locked to Any Integer Multiple of N FREF R P A B N FVCO Mode Notes 10 1 1 X 1 1 10 FD P = 1, B = 1 (bypassed) 10 1 2 X 1 2 20 FD P = 2, B = 1 (bypassed) 10 1 1 X 3 3 30 FD P = 1, B = 3 10 1 1 X 4 4 40 FD P = 1, B = 4 10 1 1 X 5 5 50 FD P = 1, B = 5 10 1 2 X 3 6 60 FD P = 2, B = 3 10 1 2 0 3 6 60 DM P and P + 1 = 2 and 3, A = 0, B = 3 10 1 2 1 3 7 70 DM P and P + 1 = 2 and 3, A = 1, B = 3 10 1 2 2 3 8 80 DM P and P + 1 = 2 and 3, A = 2, B = 3 10 1 2 1 4 9 90 DM P and P + 1 = 2 and 3, A = 1, B = 4 10 1 2 X 5 10 100 FD P = 2, B = 5 10 1 2 0 5 10 100 DM P and P + 1 = 2 and 3, A = 0, B = 5 10 1 2 1 5 11 110 DM P and P + 1 = 2 and 3, A = 1, B = 5 10 1 2 X 6 12 120 FD P = 2, B = 6 10 1 2 0 6 12 120 DM P and P + 1 = 2 and 3, A = 0, B = 6 10 1 4 0 3 12 120 DM P and P + 1 = 4 and 5, A = 0, B = 3 10 1 4 1 3 13 130 DM P and P + 1 = 4 and 5, A = 1, B = 3 |
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