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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP87702 датащи(PDF) 97 Page - Texas Instruments |
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LP87702 датащи(HTML) 97 Page - Texas Instruments |
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97 / 99 page  www.ti.com EXAMPLE BOARD LAYOUT (1.475) 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND 32X (0.25) 32X (0.6) ( 0.2) TYP VIA 28X (0.5) (4.8) (4.8) (1.475) ( 3.45) (R0.05) TYP VQFN - 0.9 mm max height RHB0032N PLASTIC QUAD FLATPACK - NO LEAD 4222893/B 02/2018 SYMM 1 8 9 16 17 24 25 32 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:18X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 33 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METAL EDGE SOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL |
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