LP87702 datasheet(48/99 Pages) TI

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Table 8-13. BUCK0_CTRL_1 Register Field Descriptions (continued)

Bit

Field

Type

Reset

Description

BUCK0_FPWM

R/W

Forces the BUCK0 converter to operate in PWM mode:

0 – Automatic transitions between PFM and PWM modes (AUTO

mode).

1 – Forced to PWM operation.

(Default from OTP memory)

BUCK0_RDIS_EN

R/W

Enable output discharge resistor when BUCK0 is disabled:

0 – Discharge resistor disabled

1 – Discharge resistor enabled.

2-1

BUCK0_EN_PIN_CTRL

R/W

Enable or disable control for BUCK0:

0x0 – only BUCK0_EN bit controls BUCK0

0x1 – BUCK0_EN bit AND EN1 pin control BUCK0

0x2 – BUCK0_EN bit AND EN2 pin control BUCK0

0x3 – BUCK0_EN bit AND EN3 pin control BUCK0

(Default from OTP memory)

BUCK0_EN

R/W

Enable BUCK0 converter:

0 – BUCK0 converter is disabled

1 – BUCK0 converter is enabled.

(Default from OTP memory)

8.6.1.1.4 BUCK0_CTRL_2 Register (Offset = 3h) [reset = 1Ah]

BUCK0_CTRL_2 is shown in Figure 8-22 and described in Table 8-14.

Return to Table 8-9.

Figure 8-22. BUCK0_CTRL_2 Register

RESERVED

BUCK0_ILIM

BUCK0_SLEW_RATE

R/W-0h

R/W-3h

R/W-2h

Table 8-14. BUCK0_CTRL_2 Register Field Descriptions

Bit

Field

Type

Reset

Description

7-6

RESERVED

R/W

5-3

BUCK0_ILIM

R/W

Sets the switch peak current limit of BUCK0. Can be programmed at

any time during operation:

0x0 – 1.5 A

0x1 – 2.0 A

0x2 – 2.5 A

0x3 – 3.0 A

0x4 – 3.5 A

0x5 – 4.0 A

0x6 – 4.5 A

0x7 – Reserved

(Default from OTP memory)

2-0

BUCK0_SLEW_RATE

R/W

Sets the output voltage slew rate for BUCK0 converter (rising and

falling edges):

0x0 – Reserved

0x1 – Reserved

0x2 – 10 mV/μs

0x3 – 7.5 mV/μs

0x4 – 3.8 mV/μs

0x5 – 1.9 mV/μs

0x6 – 0.94 mV/μs

0x7 – 0.47 mV/μs

(Default from OTP memory)

LP87702-Q1

SNVSAL1C – DECEMBER 2017 – REVISED JUNE 2021

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