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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP87702 датащи(PDF) 47 Page - Texas Instruments |
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LP87702 датащи(HTML) 47 Page - Texas Instruments |
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47 / 99 page  Return to Table 8-9. Figure 8-19. DEV_REV Register 7 6 5 4 3 2 1 0 RESERVED DEVICE_ID RESERVED R-0h R-0h R-0h Table 8-11. DEV_REV Register Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R 0h 5-3 DEVICE_ID R 0h Device specific ID code. (Default from OTP memory) 2-0 RESERVED R 0h Reserved 8.6.1.1.2 OTP_CODE Register (Offset = 1h) [reset = 0h] OTP_CODE is shown in Figure 8-20 and described in Table 8-12. Return to Table 8-9. Figure 8-20. OTP_CODE Register 7 6 5 4 3 2 1 0 OTP_ID OTP_REV R-0h R-0h Table 8-12. OTP_CODE Register Field Descriptions Bit Field Type Reset Description 7-2 OTP_ID R 0h Identification Code of the OTP EPROM. (Default from OTP memory) 1-0 OTP_REV R 0h Version number of the OTP ID. (Default from OTP memory) 8.6.1.1.3 BUCK0_CTRL_1 Register (Offset = 2h) [reset = 8h] BUCK0_CTRL_1 is shown in Figure 8-21 and described in Table 8-13. Return to Table 8-9. Figure 8-21. BUCK0_CTRL_1 Register 7 6 5 4 3 2 1 0 RESERVED BUCK0_FPWM _MP BUCK0_FPWM BUCK0_RDIS_ EN BUCK0_EN_PIN_CTRL BUCK0_EN R/W-0h R/W-0h R/W-0h R/W-1h R/W-0h R/W-0h Table 8-13. BUCK0_CTRL_1 Register Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R/W 0h 5 BUCK0_FPWM_MP R/W 0h Forces the BUCK0 converter to operate always in multi-phase and forced PWM operation mode: 0 – Automatic phase adding and shedding. 1 – Forced to multi-phase operation, 2 phases in the 2-phase configuration. (Default from OTP memory) www.ti.com LP87702-Q1 SNVSAL1C – DECEMBER 2017 – REVISED JUNE 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 47 Product Folder Links: LP87702-Q1 |
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