LP87702 datasheet(78/99 Pages) TI

78 / 99 page

Figure 8-71. WD_DIS_CTRL_CODE Register

WD_DIS_UNLOCK_CODE

R-0h

Table 8-63. WD_DIS_CTRL_CODE Register Field Descriptions

Bit

Field

Type

Reset

Description

7-0

WD_DIS_UNLOCK_COD

Unlocking WD_DIS_CTRL bit: Set WD_DIS_CTRL_LOCK=0 by

writing 0x87, 0x65, 0x1B by 3 consecutive I2C write sequences to

WD_DIS_CTRL_CODE register.

Locking WD_DIS_CTRL bit: Set WD_DIS_CTRL_LOCK=1 by writing

anything to WD_DIS_CTRL_CODE register or write WD_LOCK=1.

Reading this address returns always 0x00. WD_DIS_CTRL can be

unlocked only if WD_LOCK=0.

8.6.1.1.54 WD_DIS_CONTROL Register (Offset = 35h) [reset = 0h]

WD_DIS_CONTROL is shown in Figure 8-72 and described in Table 8-64.

Return to Table 8-9.

Figure 8-72. WD_DIS_CONTROL Register

RESERVED

WD_DIS_CTRL

_LOCK

WD_DIS_CTRL

R/W-0h

R-1h

R/W-0h

Table 8-64. WD_DIS_CONTROL Register Field Descriptions

Bit

Field

Type

Reset

Description

7-2

RESERVED

R/W

WD_DIS_CTRL_LOCK

Lock status for WD_DIS_CTRL bit.

0 – Not locked, WD_DIS_CTRL bit can be written.

1 – Locked, WD_DIS_CTRL bit is locked and cannot be changed.

Lock can be opened by writing 0x87, 0x65, 0x1B by 3

consecutive I2C write sequences to WD_DIS_CTRL_CODE register

if WD_LOCK=0. Lock can be closed by writing anything to

WD_DIS_CTRL_CODE register or writing WD_LOCK=1.

WD_DIS_CTRL

R/W

Watchdog disable pin control.

0 – Watchdog cannot be disabled by WD_DIS pin.

1 – Watchdog can be disabled by WD_DIS pin.

(Default from OTP memory)

This bit can be written 1 only if WD_LOCK=0 and

WD_DIS_CTRL_LOCK=0.

LP87702-Q1

SNVSAL1C – DECEMBER 2017 – REVISED JUNE 2021

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