NAND04GA3C2A datasheet(16/51 Pages) STMICROELECTRONICS

номер детали	NAND04GA3C2A

подробное описание детали	4Gbit, 2112 Byte Page, 3V, Multi-level NAND Flash Memory

PDF	51 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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4 Bus operations

NAND04GA3C2A, NAND04GW3C2A

16/51

4.5

Write Protect

Write Protect bus operations are used to protect the memory against program or erase

operations. When the Write Protect signal is Low the device will not accept program or erase

operations and so the contents of the memory array cannot be altered. The Write Protect

signal is not latched by Write Enable to ensure protection even during power-up.

4.6

Standby

The memory enters Standby mode by driving Chip Enable, E, High. In standby mode, the

device is deselected, outputs are disabled and power consumption is reduced.

Table 5.

Bus Operations

Bus Operation

I/O0 - I/O7

Command Input

VIL

VIH

Rising

X(1)

Command

Address Input

VIL

VIH

VIL

VIH

Rising

Address

Data Input

VIL

VIH

Rising

VIH

Data Input

Data Output

VIL

Falling

VIH

Data Output

Write Protect

VIL

Standby

VIH

VIL/VDD

WP must be VIH when issuing a Program or Erase command.

Table 6.

Address insertion(1)

Bus Cycle

I/O7

I/O6

I/O5

I/O4

I/O3

I/O2

I/O1

I/O0

1st

2nd

VIL

A11

A10

3rd

A19

A18

A17

A16

A15

A14

A13

A12

4th

A27

A26

A25

A24

A23

A22

A21

A20

5th

VIL

A29

A28

Any additional address input cycles will be ignored.

Table 7.

Address Definitions

Address

Definition

A0 - A11

Column Address

A12 - A18

Page Address

A19 - A29

Block Address

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