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STM32WB15CC датащи(PDF) 111 Page - STMicroelectronics |
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STM32WB15CC датащи(HTML) 111 Page - STMicroelectronics |
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111 / 127 page ![]() DS13258 Rev 4 111/127 STM32WB15CC Electrical characteristics 115 6.3.25 Communication interfaces characteristics I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for: Standard-mode (Sm): bit rate up to 100 kbit/s Fast-mode (Fm): bit rate up to 400 kbit/s Fast-mode Plus (Fm+): bit rate up to 1 Mbit/s. The I2C timings requirements are guaranteed by design when the I2C peripheral is properly configured (refer to the reference manual RM0473). The SDA and SCL I/O requirements are met with the following restriction: the SDA and SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but is still present. The 20 mA output drive requirement in Fast-mode Plus is supported partially. tMAX_COUNT Maximum possible count with 32-bit counter - - 65536 × 65536 tTIMxCLK fTIMxCLK = 64 MHz - 67.10 s 1. TIMx, is used as a general term where x stands for 1 or 2. Table 76. TIMx(1) characteristics (continued) Symbol Parameter Conditions Min Max Unit Table 77. IWDG min/max timeout period at 32 kHz (LSI1)(1) Prescaler divider PR[2:0] bits Min timeout RL[11:0] = 0x000 Max timeout RL[11:0] = 0xFFF Unit /4 0 0.125 512 ms /8 1 0.250 1024 /16 2 0.500 2048 /32 3 1.0 4096 /64 4 2.0 8192 /128 5 4.0 16384 /256 6 or 7 8.0 32768 1. The exact timings still depend on the phasing of the APB interface clock vs. the LSI clock, hence there is always a full RC period of uncertainty. Table 78. Minimum I2CCLK frequency in all I2C modes Symbol Parameter Condition Min Unit f(I2CCLK) I2CCLK frequency Standard-mode - 2 MHz Fast-mode Analog filter ON, DNF = 0 8 Analog filter OFF, DNF = 1 9 Fast-mode Plus Analog filter ON, DNF = 0 18 Analog filter OFF, DNF = 1 16 |
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