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Z8F082ASH020SC датащи(PDF) 43 Page - Zilog, Inc. |
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Z8F082ASH020SC датащи(HTML) 43 Page - Zilog, Inc. |
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43 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y Reset and STOP Mode Recovery Z8 Encore! XP® F08xA Series Product Specification 25 trol Register is set to 1. Table 10 lists the STOP Mode Recovery sources and resulting actions. The text following provides more detailed information about each of the STOP Mode Recovery sources. STOP Mode Recovery Using Watch-Dog Timer Time-Out If the Watch-Dog Timer times out during STOP mode, the device undergoes a STOP Mode Recovery sequence. In the Watch-Dog Timer Control register, the WDT and STOP bits are set to 1. If the Watch-Dog Timer is configured to generate an interrupt upon time- out and the Z8 Encore! XP® F08xA Series device is configured to respond to interrupts, the eZ8 CPU services the Watch-Dog Timer interrupt request following the normal STOP Mode Recovery sequence. STOP Mode Recovery Using a GPIO Port Pin Transition Each of the GPIO Port pins may be configured as a STOP Mode Recovery input source. On any GPIO pin enabled as a STOP Mode Recovery source, a change in the input pin value (from High to Low or from Low to High) initiates STOP Mode Recovery. In the Watch-Dog Timer Control register, the STOP bit is set to 1. In STOP mode, the GPIO Port Input Data registers (PxIN) are disabled. The Port Input Data registers record the Port transition only if the signal stays on the Port pin through the end of the STOP Mode Recovery delay. As a result, short pulses on the Port pin can initiate STOP Mode Recovery without being written to the Port Input Data register or without initiating an interrupt (if enabled for that pin). Table 10. STOP Mode Recovery Sources and Resulting Action Operating Mode STOP Mode Recovery Source Action STOP mode Watch-Dog Timer time-out when configured for Reset STOP Mode Recovery Watch-Dog Timer time-out when configured for interrupt STOP Mode Recovery followed by interrupt (if interrupts are enabled) Data transition on any GPIO Port pin enabled as a STOP Mode Recovery source STOP Mode Recovery Assertion of external RESET Pin System Reset Debug Pin driven Low System Reset Caution: |
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