Z8F082ASH020SC datasheet(41/244 Pages) ZILOG

номер детали	Z8F082ASH020SC

подробное описание детали	Z8 Encore XP-R F08xA Series with eXtended Peripherals

PDF	244 Pages

Scroll/Zoom	100%

производитель	ZILOG [Zilog, Inc.]

домашняя страница	http://www.zilog.com

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PS024705-0405

P R E L I M I N A R Y

Reset and STOP Mode Recovery

Z8 Encore! XP® F08xA Series

Product Specification

Figure 5.Voltage Brown-Out Reset Operation

The POR level is greater than the VBO level by the specified hysteresis value. This

ensures that the device undergoes a power on reset after recovering from a VBO condition.

Watch-Dog Timer Reset

If the device is in NORMAL or STOP mode, the Watch-Dog Timer can initiate a System

Reset at time-out if the WDT_RES Flash Option Bit is programmed to 1. This is the

unprogrammed state of the WDT_RES Flash Option Bit. If the bit is programmed to 0, it

configures the Watch-Dog Timer to cause an interrupt, not a System Reset, at time-out.

The WDT status bit in the WDT Control register is set to signify that the reset was initi-

ated by the Watch-Dog Timer.

External Reset Input

The RESET pin has a Schmitt-triggered input and an internal pull-up resistor. Once the

RESET pin is asserted for a minimum of 4 system clock cycles, the device progresses

through the System Reset sequence. Because of the possible asynchronicity of the system

clock and reset signals, the required reset duration may be as short as three clock periods

VCC = 3.3V

VPOR

VVBO

Internal RESET

signal

Program

Execution

Program

Execution

Voltage

Brownout

VCC = 3.3V

System Clock

WDT Clock

POR

counter delay

Note: Not to Scale

Z8F082ASH020SC датащи(PDF) 41 Page - Zilog, Inc.