Z8F082ASH020SC datasheet(14/244 Pages) ZILOG

14 / 244 page

PS024705-0405

P R E L I M I N A R Y

List of Tables

Z8 Encore! XP® F08xA Series

Product Specification

xiv

List of Tables

Table 1. Revision History of this Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

Table 2. Z8 Encore! XP“ F08xA Series Family Part Selection Guide. . . . . . . . . . 2

Table 3. Z8 Encore! XP“ F08xA Series Package Options . . . . . . . . . . . . . . . . . . 7

Table 4. Signal Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 5. Pin Characteristics (20- and 28-pin Devices) . . . . . . . . . . . . . . . . . . . . 11

Table 6. Z8 Encore! XP“ F08xA Series Program Memory Maps . . . . . . . . . . . . 13

Table 7. Z8 Encore! XP“ F08xA Series Flash Memory Information Area Map. . 14

Table 8. Register File Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 9. Reset and STOP Mode Recovery Characteristics and Latency. . . . . . 19

Table 10. Reset Sources and Resulting Reset Type . . . . . . . . . . . . . . . . . . . . . 21

Table 11. STOP Mode Recovery Sources and Resulting Action . . . . . . . . . . . . 25

Table 12. Reset Status Register (RSTSTAT). . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 13. Power Control Register 0 (PWRCTL0). . . . . . . . . . . . . . . . . . . . . . . . 30

Table 14. Port Availability by Device and Package Type . . . . . . . . . . . . . . . . . . 31

Table 15. Port Alternate Function Mapping (20/28-Pin Parts) . . . . . . . . . . . . . . 34

Table 16. GPIO Port Registers and Sub-Registers . . . . . . . . . . . . . . . . . . . . . . 37

Table 17. Port A–D GPIO Address Registers (PxADDR). . . . . . . . . . . . . . . . . . 37

Table 18. Port A–D Control Registers (PxCTL) . . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 19. Port A–D Data Direction Sub-Registers (PxDD) . . . . . . . . . . . . . . . . 39

Table 20. Port A–D Alternate Function Sub-Registers (PxAF). . . . . . . . . . . . . . 39

Table 21. Port A–D Output Control Sub-Registers (PxOC) . . . . . . . . . . . . . . . . 40

Table 22. Port A–D High Drive Enable Sub-Registers (PxHDE) . . . . . . . . . . . . 40

Table 23. Port A–D STOP Mode Recovery Source Enable Sub-Registers (Px-

SMRE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Table 24. Port A–D Pull-Up Enable Sub-Registers (PxPUE) . . . . . . . . . . . . . . . 41

Table 25. Port A–D Alternate Function Set 1 Sub-Registers (PxAFS1). . . . . . . 42

Table 26. Port A–D Alternate Function Set 2 Sub-Registers (PxAFS2). . . . . . . 42

Table 27. Port A–C Input Data Registers (PxIN) . . . . . . . . . . . . . . . . . . . . . . . . 43

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