поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

Z8F082ASH020SC датащи(PDF) 75 Page - Zilog, Inc.

номер детали Z8F082ASH020SC
подробное описание детали  Z8 Encore XP-R F08xA Series with eXtended Peripherals
PDF  244 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  ZILOG [Zilog, Inc.]
домашняя страница  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8F082ASH020SC датащи(HTML) 75 Page - Zilog, Inc.

Back Button Z8F082ASH020SC Datasheet HTML 71Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 72Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 73Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 74Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 75Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 76Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 77Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 78Page - Zilog, Inc. Z8F082ASH020SC Datasheet HTML 79Page - Zilog, Inc. Next Button
Zoom Inzoom in Zoom Outzoom out
 75 / 244 page
background image
PS024705-0405
P R E L I M I N A R Y
Interrupt Controller
Z8 Encore! XP® F08xA Series
Product Specification
57
Because these shared interrupts are edge-triggered, it is possible to generate an interrupt
just by switching from one shared source to another. For this reason, an interrupt must be
disabled before switching between sources.
PA6CS—PA6/Comparator Selection
0 = PA6 is used for the interrupt for PA6CS interrupt request.
1 = The Comparator is used for the interrupt for PA6CS interrupt request.
Reserved—Must be 0.
Interrupt Control Register
The Interrupt Control (IRQCTL) register (Table 46) contains the master enable bit for all
interrupts.
IRQE—Interrupt Request Enable
This bit is set to 1 by executing an EI (Enable Interrupts) or IRET (Interrupt Return)
instruction, or by a direct register write of a 1 to this bit. It is reset to 0 by executing a DI
instruction, eZ8 CPU acknowledgement of an interrupt request, Reset or by a direct regis-
ter write of a 0 to this bit.
0 = Interrupts are disabled.
1 = Interrupts are enabled.
Reserved—Must be 0.
Table 45. Shared Interrupt Select Register (IRQSS)
BITS
7
6
5
4
3
2
1
0
FIELD
Reserved
PA6CS
Reserved
RESET
0
000
00
00
R/W
R/WR/W
R/WR/W
R/WR/W
R/WR/W
ADDR
FCEH
Table 46. Interrupt Control Register (IRQCTL)
BITS
7
6
5
4
3
2
1
0
FIELD
IRQE
Reserved
RESET
0
000
00
00
R/W
R/W
R
R
RRR
RR
ADDR
FCFH



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com