MPC885ZP80 datasheet(9/87 Pages) NXP

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MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7

Freescale Semiconductor

Maximum Tolerated Ratings

This section provides the maximum tolerated voltage and temperature ranges for the MPC885/MPC880.

Table 2 displays the maximum tolerated ratings, and Table 3 displays the operating temperatures.

Figure 3 shows the undershoot and overshoot voltages at the interfaces of the MPC885/MPC880.

Figure 3. Undershoot/Overshoot Voltage for VDDH and VDDL

Table 2. Maximum Tolerated Ratings

Rating

Symbol

Value

Unit

Supply voltage1

1 The power supply of the device must start its ramp from 0.0 V.

VDDH

–0.3 to 4.0

VDDL

–0.3 to 2.0

VDDSYN

–0.3 to 2.0

Difference between VDDL and VDDSYN

<100

Input voltage2

2 Functional operating conditions are provided with the DC electrical specifications in Table 6. Absolute maximum ratings are

stress ratings only; functional operation at the maxima is not guaranteed. Stress beyond those listed may affect device

reliability or cause permanent damage to the device. See Section 8, “Power Supply and Power Sequencing.”

Caution: All inputs that tolerate 5 V cannot be more than 2.5 V greater than VDDH. This restriction applies to power up and

normal operation (that is, if the MPC885/MPC880 is unpowered, a voltage greater than 2.5 V must not be applied to its inputs).

Vin

GND – 0.3 to VDDH

Storage temperature range

Tstg

–55 to +150

°C

GND

GND – 0.3 V

GND – 0.7 V

Not to Exceed 10%

VDDH/VDDL + 20%

VDDH/VDDL

VDDH/VDDL + 5%

of tinterface

1. tinterface refers to the clock period associated with the bus clock interface.

VIH

VIL

Note:

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