MPC885ZP80 datasheet(71/87 Pages) NXP

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MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7

Freescale Semiconductor

USB Electrical Characteristics

14 USB Electrical Characteristics

This section provides the AC timings for the USB interface.

14.1

USB Interface AC Timing Specifications

The USB Port uses the transmit clock on SCC1. Table 33 lists the USB interface timings.

15 FEC Electrical Characteristics

This section provides the AC electrical specifications for the fast Ethernet controller (FEC). Note that the

timing specifications for the MII signals are independent of system clock frequency (part speed

designation). Also, MII signals use TTL signal levels compatible with devices operating at either 5.0 or

3.3 V.

15.1

MII and Reduced MII Receive Signal Timing

The receiver functions correctly up to a MII_RX_CLK maximum frequency of 25 MHz + 1%. The

reduced MII (RMII) receiver functions correctly up to a RMII_REFCLK maximum frequency of

50 MHz + 1%. There is no minimum frequency requirement. In addition, the processor clock frequency

must exceed the MII_RX_CLK frequency – 1%.

Table 34 provides information on the MII and RMII receive signal timing.

Table 33. USB Interface AC Timing Specifications

Name

Characteristic

All Frequencies

Unit

Min

Max

US1

USBCLK frequency of operation1

Low speed

Full speed

1 USBCLK accuracy should be ±500 ppm or better. USBCLK may be stopped to conserve power.

MHz

US4

USBCLK duty cycle (measured at 1.5 V)

Table 34. MII Receive Signal Timing

Num

Characteristic

Min

Max

Unit

MII_RXD[3:0], MII_RX_DV, MII_RX_ERR to MII_RX_CLK setup

—

MII_RX_CLK to MII_RXD[3:0], MII_RX_DV, MII_RX_ER hold

—

MII_RX_CLK pulse width high

35%

65%

MII_RX_CLK period

MII_RX_CLK pulse width low

35%

65%

MII_RX_CLK period

M1_RMII

RMII_RXD[1:0], RMII_CRS_DV, RMII_RX_ERR to RMII_REFCLK

setup

4—

M2_RMII

RMII_REFCLK to RMII_RXD[1:0], RMII_CRS_DV, RMII_RX_ERR

hold

2—

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