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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC885ZP80 датащи(PDF) 23 Page - NXP Semiconductors |
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MPC885ZP80 датащи(HTML) 23 Page - NXP Semiconductors |
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23 / 87 page  MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 Freescale Semiconductor 23 Bus Signal Timing B36 A(0:31), BADDR(28:30), and D(0:31) to GPL valid, as requested by control bit GxT4 in the corresponding word in the UPM (MIN = 0.25 × B1 – 2.00) 5.60 — 4.30 — 1.80 — 1.13 — ns B37 UPWAIT valid to CLKOUT falling edge9 (MIN = 0.00 × B1 + 6.00) 6.00 — 6.00 — 6.00 — 6.00 — ns B38 CLKOUT falling edge to UPWAIT valid 9 (MIN = 0.00 × B1 + 1.00) 1.00 — 1.00 — 1.00 — 1.00 — ns B39 AS valid to CLKOUT rising edge10 (MIN = 0.00 × B1 + 7.00) 7.00 — 7.00 — 7.00 — 7.00 — ns B40 A(0:31), TSIZ(0:1), RD/WR, BURST, valid to CLKOUT rising edge (MIN = 0.00 × B1 + 7.00) 7.00 — 7.00 — 7.00 — 7.00 — ns B41 TS valid to CLKOUT rising edge (setup time) (MIN = 0.00 × B1 + 7.00) 7.00 — 7.00 — 7.00 — 7.00 — ns B42 CLKOUT rising edge to TS valid (hold time) (MIN = 0.00 × B1 + 2.00) 2.00 — 2.00 — 2.00 — 2.00 — ns B43 AS negation to memory controller signals negation (MAX = TBD) —TBD —TBD —TBD —TBD ns 1 For part speeds above 50 MHz, use 9.80 ns for B11a. 2 The timing required for BR input is relevant when the MPC885/MPC880 is selected to work with the internal bus arbiter. The timing for BG input is relevant when the MPC885/MPC880 is selected to work with the external bus arbiter. 3 For part speeds above 50 MHz, use 2 ns for B17. 4 The D(0:31) input timings B18 and B19 refer to the rising edge of the CLKOUT in which the TA input signal is asserted. 5 For part speeds above 50 MHz, use 2 ns for B19. 6 The D(0:31) input timings B20 and B21 refer to the falling edge of the CLKOUT. This timing is valid only for read accesses controlled by chip-selects under control of the user-programmable machine (UPM) in the memory controller, for data beats where DLT3 = 1 in the RAM words. (This is only the case where data is latched on the falling edge of CLKOUT.) 7 This formula applies to bus operation up to 50 MHz. 8 The timing B30 refers to CS when ACS = 00 and to CS and WE(0:3) when CSNT = 0. 9 The signal UPWAIT is considered asynchronous to the CLKOUT and synchronized internally. The timings specified in B37 and B38 are specified to enable the freeze of the UPM output signals as described in Figure 21. 10 The AS signal is considered asynchronous to the CLKOUT. The timing B39 is specified in order to allow the behavior specified in Figure 24. Table 9. Bus Operation Timings (continued) Num Characteristic 33 MHz 40 MHz 66 MHz 80 MHz Unit Min Max Min Max Min Max Min Max |
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