MPC885ZP80 datasheet(6/87 Pages) NXP

6 / 87 page

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7

Freescale Semiconductor

Features

– Flexible data buffers with multiple buffers per frame

– Automatic retransmission upon transmit error

— The USB host controller has the following features:

– Supports control, bulk, interrupt, and isochronous data transfers

– CRC16 generation and checking

– NRZI encoding/decoding with bit stuffing

– Supports both 12- and 1.5-Mbps data rates (automatic generation of preamble token and

data rate configuration). Note that low-speed operation requires an external hub.

– Flexible data buffers with multiple buffers per frame

– Supports local loop back mode for diagnostics (12 Mbps only)

•

Serial peripheral interface (SPI)

— Supports master and slave modes

— Supports multiple-master operation on the same bus

•

Inter-integrated circuit (I2C) port

— Supports master and slave modes

— Supports a multiple-master environment

•

Time-slot assigner (TSA)

— Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation

— Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined

— 1- or 8-bit resolution

— Allows independent transmit and receive routing, frame synchronization, and clocking

— Allows dynamic changes

— Can be internally connected to four serial channels (two SCCs and two SMCs)

•

Parallel interface port (PIP)

— Centronics interface support

— Supports fast connection between compatible ports on MPC885/MPC880 and other MPC8xx

devices

•

PCMCIA interface

— Master (socket) interface, release 2.1-compliant

— Supports two independent PCMCIA sockets

— 8 memory or I/O windows supported

•

Debug interface

— Eight comparators: four operate on instruction address, two operate on data address, and two

operate on data

— Supports conditions: =

≠ <>

— Each watchpoint can generate a break point internally.

•

Normal high and normal low power modes to conserve power

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