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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADPD107 датащи(PDF) 7 Page - Analog Devices |
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ADPD107 датащи(HTML) 7 Page - Analog Devices |
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7 / 66 page  Data Sheet ADPD105/ADPD106/ADPD107 Rev. A | Page 7 of 66 PERFORMANCE SPECIFICATIONS AVDD = DVDD = 1.8 V, TA = full operating temperature range, unless otherwise noted. Table 3. Parameter Test Conditions/Comments Min Typ Max Unit DATA ACQUISITION Resolution Single pulse 14 Bits Resolution/Sample 64 to 255 pulses 20 Bits Resolution/Data Read 64 to 255 pulses and sample average = 128 27 Bits LED DRIVER LED Current Slew Rate1 Rise Slew rate control setting = 0; TA = 25°C; ILED = 70 mA 240 mA/μs Slew rate control setting = 7; TA = 25°C; ILED = 70 mA 1400 mA/μs Fall Slew rate control setting = 0, 1, 2; TA = 25°C; ILED = 70 mA 3200 mA/μs Slew rate control setting = 6, 7; TA = 25°C; ILED = 70 mA 4500 mA/μs LED Peak Current LED pulse enabled 370 mA Driver Compliance Voltage Voltage above ground required for LED driver operation 0.6 V LED PERIOD AFE width = 4 μs2 19 μs AFE width = 3 μs 17 μs Sampling Frequency3 Time Slot A only; normal mode; 1 pulse; SLOTA_LED_OFFSET = 23 μs; SLOTA_ LED_PERIOD = 19 μs 0.122 3230 Hz Time Slot B only; normal mode; 1 pulse; SLOTA_LED_OFFSET = 23 μs; SLOTA_ LED_PERIOD = 19 μs 0.122 3820 Hz Both time slots; normal mode; 1 pulse; SLOTA_LED_OFFSET = 23 μs; SLOTA_ LED_PERIOD = 19 μs 0.122 1750 Hz Time Slot A only; normal mode; 8 pulses; SLOTA_LED_OFFSET = 23 μs; SLOTA_ LED_PERIOD = 19 μs 0.122 2257 Hz Time Slot B only; normal mode; 8 pulses; SLOTA_LED_OFFSET = 23 μs; SLOTA_ LED_PERIOD = 19 μs 0.122 2531 Hz Both time slots; normal mode; 8 pulses; SLOTA_LED_OFFSET = 23 μs; SLOTA_ LED_PERIOD = 19 μs 0.122 1193 Hz CATHODE PIN (PDC) VOLTAGE During All Sampling Periods Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 14 1.8 V Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 0 1.3 V During Slot A Sampling Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x04 1.8 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x1 1.3 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x2 1.55 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[9:8] = 0x35 0 V During Slot B Sampling Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x04 1.8 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x1 1.3 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x2 1.55 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[11:10] = 0x35 0 V During Sleep Periods Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 1 1.8 V Register 0x54, Bit 7 = 0x0; Register 0x3C, Bit 9 = 0 1.3 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x0 1.8 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x1 1.3 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x2 1.55 V Register 0x54, Bit 7 = 0x1; Register 0x54, Bits[13:12] = 0x3 0 V PHOTODIODE INPUT PINS/ ANODE VOLTAGE During All Sampling Periods 1.3 V During Sleep Periods Cathode voltage V 1 LED inductance is negligible for these values. The effective slew rate slows with increased inductance. 2 Minimum LED period = (2 × AFE width) + 5 μs. 3 The maximum values in this specification are the internal ADC sampling rates in normal mode. The I2C read rates in some configurations may limit the output data rate. 4 This mode may induce additional noise and is not recommended unless absolutely necessary. The 1.8 V setting uses VDD, which contains greater amounts of differential voltage noise with respect to the anode voltage. A differential voltage between the anode and cathode injects a differential current across the capacitance of the photodiode of the magnitude of C × dV/dt. 5 This setting is not recommended for photodiodes because it causes a 1.3 V forward bias of the photodiode. |
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