ADPD107 datasheet(32/66 Pages) AD

32 / 66 page

ADPD105/ADPD106/ADPD107

Data Sheet

Rev. A | Page 32 of 66

In this example, the LED pulse width, tLED_PULSE, is 3 μs, and the

LED pulse period, tLED_PERIOD, is 19 μs. The LED being driven is a

pair of green LEDs driven to a 250 mA peak. The goal of CVLED

is to buffer the LED between individual pulses. In the worst case

scenario, where the pulse train shown in Figure 39 is a continuous

sequence of short pulses, the VLEDx supply must supply the

average current. Therefore, calculate ILED_AVERAGE as follows:

ILED_AVERAGE = (tLED_PULSE/tLED_PERIOD) × ILED_MAX

(1)

where:

ILED_AVERAGE is the average current needed from the VLEDx supply

during the pulse period, and it is also the VLEDx supply current

rating.

ILED_MAX is the peak current setting of the LED.

For the numbers shown in Equation 1, ILED_AVERAGE = 3/19 ×

ILED_MAX. For typical LED timing, the average VLEDx supply

current is 3/19 × 250 mA = 39.4 mA, indicating that the VLEDx

supply must support a dc current of 40 mA.

DETERMINING CVLED

To determine the CVLED capacitor value, determine the maximum

forward-biased voltage, VFB_LED_MAX, of the LED in operation.

The LED current, ILED_MAX, converts to VFB_LED_MAX as shown in

Figure 40. In this example, 250 mA of current through two green

LEDs in parallel yields VFB_LED_MAX = 3.95 V. Any series resistance

in the LED path must also be included in this voltage. When

designing the LED path, keep in mind that small resistances can

add up to large voltage drops due to the LED peak current being

very large. In addition, these resistances can be unnecessary

constraints on the VLEDx supply.

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

100

150

200

250

LED DRIVER CURRENT SETTING (mA)

TWO 528nm LEDs

ONE 850nm LED

Figure 40. Example of the Average LED Forward-Bias Voltage Drop as a

Function of the Driver Current

To correctly size the CVLED capacitor, do not deplete it during the

pulse of the LED to the point where the voltage on the capacitor is

less than the forward bias on the LED. To calculate the minimum

value for the VLEDx bypass capacitor, use the following equation:

)

(









MAX

LED

MIN

LED

MAX

LED

LED_PULSE

VLED

(2)

where:

tLED_PULSE is the LED pulse width.

ILED_MAX is the maximum forward-biased current on the LED

used in operating the device.

VLED_MIN is the lowest voltage from the VLEDx supply with no load.

VFB_LED_MAX is the maximum forward-biased voltage required on

the LED to achieve ILED_MAX.

The numerator of the CVLED equation sets up the total discharge

amount in coulombs from the bypass capacitor to satisfy a

single programmed LED pulse of the maximum current. The

denominator represents the difference between the lowest voltage

from the VLEDx supply and the LED required voltage. The LED

required voltage is the voltage of the anode of the LED such that

the 0.2 V compliance of the LED driver and the forward-biased

voltage of the LED operating at the maximum current is satisfied.

For a typical ADPD105/ADPD106/ADPD107 example, assume

that the lowest value for the VLEDx supply is 4.4 V, and that the

peak current is 250 mA for two 528 nm LEDs in parallel. The

minimum value for CVLED is then equal to 3 μF.

CVLED = (3 × 10−6 × 0.250)/(4.4 – (3.95 + 0.2)) = 3 μF

(3)

As shown in the Equation 3, as the minimum supply voltage drops

close to the maximum anode voltage, the demands on CVLED

become more stringent, forcing the capacitor value higher. It is

important to insert the correct values into Equation 2, Equation 2,

and Equation 3. For example, using an average value for VLED_MIN

instead of the worst case value for VLED_MIN can cause a serious

design deficiency, resulting in a CVLED value that is too small and

that causes insufficient optical power in the application. Therefore,

adding a sufficient margin on CVLED is strongly recommended. Add

additional margin to CVLED to account for derating of the capacitor

value over voltage, bias, temperature, and other factors over the life

of the component.

LED INDUCTANCE CONSIDERATIONS

The LED drivers (LEDXx) on the ADPD105/ADPD106/ADPD107

have configurable slew rate settings (Register 0x22, Bits[6:4],

rates are defined in Table 3. Even at the lowest setting, careful

consideration must be taken in board design and layout. If a large

series inductor, such as a long PCB trace, is placed between the

LED cathode and one of the LEDXx pins, voltage spikes from

the switched inductor can cause violations of absolute maximum

and minimum voltages on the LEDXx pins during the slew

portion of the LED pulse.

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