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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP8733 датащи(PDF) 60 Page - Texas Instruments |
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LP8733 датащи(HTML) 60 Page - Texas Instruments |
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60 / 86 page  60 LP8733 SNVSBK2 – SEPTEMBER 2019 www.ti.com Product Folder Links: LP8733 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Table 42. BUCK_MASK Register Field Descriptions (continued) Bits Field Type Default Description 3 BUCK0_PGF_MAS K R/W X Masking of the Power Good invalid detection for the Buck0 power good interrupt (BUCK0_PG_INT in INT_BUCK register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect BUCK0_PG_STAT status bit in BUCK_STAT register. 2 BUCK0_PGR_MAS K R/W X Masking of the Power Good valid detection for the Buck0 power good interrupt (BUCK0_PG_INT in INT_BUCK register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the BUCK0_PG_STAT status bit in the BUCK_STAT register. 1 Reserved - do not use R 0 0 BUCK0_ILIM _MASK R/W X Masking for the Buck0 current limit detection interrupt (BUCK0_ILIM_INT in INT_BUCK register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the BUCK0_ILIM_STAT status bit in the BUCK_STAT register. 7.6.1.36 LDO_MASK LDO_MASK is shown in Table 43, Address: 0x23 Figure 64. LDO_MASK Register D7 D6 D5 D4 D3 D2 D1 D0 LDO1_PGF _MASK LDO1_PGR _MASK Reserved - do not use LDO1_ILIM _MASK LDO0_PGF _MASK LDO0_PGR _MASK Reserved - do not use LDO0_ILIM _MASK Table 43. LDO_MASK Register Field Descriptions Bits Field Type Default Description 7 LDO1_PGF_MASK R/W X Masking of the Power Good invalid detection for the LDO1 power good interrupt (LDO1_PG_INT in INT_LDO register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the LDO1_PG_STAT status bit in the LDO_STAT register. 6 LDO1_PGR_MASK R/W X Masking of the Power Good valid detection for the LDO1 power good interrupt (LDO1_PG_INT in INT_LDO register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the LDO1_PG_STAT status bit in the LDO_STAT register. 5 Reserved - do not use R 0 4 LDO1_ILIM _MASK R/W X Masking for the LDO1 current limit detection interrupt (LDO1_ILIM_INT in INT_LDO register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the LDO1_ILIM_STAT status bit in the LDO_STAT register. 3 LDO0_PGF_MASK R/W X Masking of the Power Good invalid detection for the LDO0 power good interrupt (LDO0_PG_INT in INT_LDO register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the LDO0_PG_STAT status bit in the LDO_STAT register. 2 LDO0_PGR_MASK R/W X Masking of Power Good valid detection for the LDO0 power good interrupt (LDO0_PG_INT in INT_LDO register): 0 - Interrupt is generated. 1 - Interrupt is not generated. This bit does not affect the LDO0_PG_STAT status bit in the LDO_STAT register. 1 Reserved - do not use R 0 |
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