LP8733 datasheet(48/86 Pages) TI

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LP8733

SNVSBK2 – SEPTEMBER 2019

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Table 17. LDO1_CTRL Register Field Descriptions (continued)

Bits

Field

Type

Default

Description

LDO1_RDIS_EN

R/W

Enable output discharge resistor (RDIS_LDOx) when the LDO1 is disabled:

0 - Discharge resistor is disabled.

1 - Discharge resistor is enabled.

LDO1_EN_PIN

_CTRL

R/W

Enable control for the LDO1:

0 - only the LDO1_EN bit controls the LDO1.

1 - LDO1_EN bit and the EN pin control the LDO1.

LDO1_EN

R/W

Enable the LDO1 regulator:

0 - LDO1 regulator is disabled.

1 - LDO1 regulator is enabled.

7.6.1.11 LDO0_VOUT

LDO0_VOUT is shown in Table 18, Address: 0x0A

Figure 39. LDO0_VOUT Register

Reserved - do not use

LDO0_VSET[4:0]

Table 18. LDO0_VOUT Register Field Descriptions

Bits

Field

Type

Default

Description

7:5

Reserved - do not

use

R/W

000

4:0

LDO0_VSET[4:0]

R/W

Sets the output voltage of the LDO0 regulator:

0.8 V - 3.3 V, 100 mV steps

0x00 - 0.8V

...

0x19 - 3.3 V

Reserved; do not use.

0x1A ... 0x1F

7.6.1.12 LDO1_VOUT

LDO1_VOUT is shown in Table 19, Address: 0x0B

Figure 40. LDO1_VOUT Register

Reserved - do not use

LDO1_VSET[4:0]

Table 19. LDO1_VOUT Register Field Descriptions

Bits

Field

Type

Default

Description

7:5

Reserved - do not

use

R/W

000

4:0

LDO1_VSET[4:0]

R/W

Sets the output voltage of the LDO1 regulator:

0.8 V - 3.3 V, 100 mV steps

0x00 - 0.8V

...

0x19 - 3.3 V

Reserved; do not use.

0x1A ... 0x1F

7.6.1.13 BUCK0_DELAY

BUCK0_DELAY is shown in Table 20, Address: 0x0C

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