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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP8733 датащи(PDF) 56 Page - Texas Instruments |
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LP8733 датащи(HTML) 56 Page - Texas Instruments |
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56 / 86 page  56 LP8733 SNVSBK2 – SEPTEMBER 2019 www.ti.com Product Folder Links: LP8733 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Table 35. INT_BUCK Register Field Descriptions (continued) Bits Field Type Default Description 4 BUCK1_ILIM_INT R/W 0 Latched status bit indicating that the Buck1 output current limit has been active. Write 1 to clear. 3 Reserved - do not use R/W 0 2 BUCK0_PG_INT R/W 0 Latched status bit indicating that the Buck0 Power-Good event has been detected. Write 1 to clear. 1 BUCK0_SC_INT R/W 0 Latched status bit indicating that the Buck0 output voltage has been over 1 ms below the short-circuit threshold level. Write 1 to clear. 0 BUCK0_ILIM_INT R/W 0 Latched status bit indicating that the Buck0 output current limit has been active. Write 1 to clear. 7.6.1.29 INT_LDO INT_LDO is shown in Table 36, Address: 0x1C Figure 57. INT_LDO Register D7 D6 D5 D4 D3 D2 D1 D0 Reserved - do not use LDO1_PG _INT LDO1_SC _INT LDO1_ILIM _INT Reserved - do not use LDO0_PG _INT LDO0_SC _INT LDO0_ILIM _INT Table 36. INT_LDO Register Field Descriptions Bits Field Type Default Description 7 Reserved - do not use R/W 0 6 LDO1_PG_INT R/W 0 Latched status bit indicating that the LDO1 Power-Good event has been detected. Write 1 to clear. 5 LDO1_SC_INT R/W 0 Latched status bit indicating that the LDO1 output voltage has been over 1 ms below the short-circuit threshold level. Write 1 to clear. 4 LDO1_ILIM_INT R/W 0 Latched status bit indicating that the LDO1 output current limit has been active. Write 1 to clear. 3 Reserved - do not use R/W 0 2 LDO0_PG_INT R/W 0 Latched status bit indicating that the LDO0 Power-Good event has been detected. Write 1 to clear. 1 LDO0_SC_INT R/W 0 Latched status bit indicating that the LDO0 output voltage has been over 1 ms below the short-circuit threshold level. Write 1 to clear. 0 LDO0_ILIM_INT R/W 0 Latched status bit indicating that the LDO0 output current limit has been active. Write 1 to clear. 7.6.1.30 TOP_STAT TOP_STAT is shown in Table 37, Address: 0x1D Figure 58. TOP_STAT Register D7 D6 D5 D4 D3 D2 D1 D0 PGOOD_STAT Reserved - do not use SYNC_CLK _STAT TDIE_SD _STAT TDIE_WARN _STAT OVP_STAT Reserved - do not use |
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