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UPD360 датащи(PDF) 198 Page - Microchip Technology |
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UPD360 датащи(HTML) 198 Page - Microchip Technology |
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198 / 221 page ![]() UPD360 DS00002084C-page 198 2016-2017 Microchip Technology Inc. 14.4.2 HPD INTERRUPT STATUS REGISTER (HPD_INT_STS) The contents of this register reset to 00h when the HPD Enable bit in the HPD Control Register (HPD_CTL) is cleared. Address: 0C01h Size: 8 bits BITS DESCRIPTION TYPE DEFAULT 7:4 RESERVED RO - 3 QUEUE_NOT_EMPTY Indicates that the HPD Event Queue Register (HPD_QUEUE) is not empty. Note: This interrupt is cleared after HPD Event Queue Register (HPD_- QUEUE) is read. Note: This bit only has meaning when the HPD pin is configured as an input. RO 0b 2 HPD_HIGH When set, indicates that an HPD Low to High transition has been detected. Note: The source of this input is a pulse and does not persist after being cleared. Note: This bit only has meaning when the HPD pin is configured as an input. R/WC 0b 1 HPD_LOW When set, indicates that an HPD High to Low transition has been detected. Note: The source of this input is a pulse and does not persist after being cleared. Note: This bit only has meaning when the HPD pin is configured as an input. R/WC 0b 0 IRQ_HPD When set, indicates that an HPD IRQ has been detected. Note: The source of this input is a pulse and does not persist after being cleared. Note: When the HPD pin is configured as an input, this bit indicates that an IRQ_HPD has been detected. When the HPD pin is configured as an output, this pin indicates that the request to generate an IRQ_HPD has completed. R/WC 0b |
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