VSC7511 datasheet(36/324 Pages) MICROSEMI

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Functional Descriptions

VMDS-10488 VSC7511 Datasheet Revision 4.2

The MAC generates and transmits a priority-based pause frames whenever a queue is congested. The

device prevents excessive pause frame generation by waiting half the pause timer value between

transmissions of pause frames.

When an ingress queue de-asserts the flow control condition, the MAC does not generate a priority-

based pause frame with pause timer 0 for the priority. Instead, the timer in the link partner must expire.

However, if another queue asserts flow control, then a priority-based pause frame is generated for that

priority and for all uncongested queues a pause timer 0 is signaled to the link partner.

3.2.1.7

Frame Aging

The following table lists the registers associated with frame aging.

The MAC supports frame aging where frames are discarded if a maximum transit delay through the

switch is exceeded. All frames, including CPU-injected frames, are subject to aging. The transit delay is

time from when a frame is fully received until that frame is scheduled for transmission through the egress

MAC. The maximum allowed transit delay is configured in SYS::FRM_AGING.

Frame aging can be disabled per port (REW::PORT_CFG.AGE_DIS).

Discarded frames due to frame aging are counted in the c_tx_aged counter.

3.2.1.8

Rx and Tx Time Stamps

The following table lists the registers associated with Rx and Tx time stamping.

The MAC supports Rx and Tx time stamping where a frame’s receive time and transmit time are sampled

using a nanoseconds counter. The receive and transmit time stamps are shifted in time so that the

resulting time stamps align with the exact reception and transmission of the first byte in the frame. This

adjusts for local delays in the receive path and the transmit path. The time stamps are individually

adjusted as follows:

•

Rx time stamp: Sampling of the MAC’s nanoseconds counter plus

DEV:PORT_MODE:RX_PATH_DELAY.

•

Tx time stamp: Sampling of the MAC’s nanoseconds counter plus

DEV:PORT_MODE:TX_PATH_DELAY.

The Rx and Tx path delays are signed so negative adjustments can be achieved by setting the most

significant bit.

The PTP_PREDICT_CFG register must be configured according to the operating mode of the port.

When the ingress port is operating in backplane mode

(ANA:PORT:PTP_CFG.PTP_BACKPLANE_MODE), the Rx time stamp is set to the value of the 4-byte

reserved field at offset 16 bytes in the incoming frame’s PTP header instead of using the adjusted Rx

time stamp from the MAC.

Table 8 •

Frame Aging Configuration Registers

Description

Replication

SYS::FRM_AGING

Frame aging time

None

REW::PORT_CFG.AGE_DIS

Disable frame aging

Per port

Table 9 •

Rx and Tx Time Stamping Register

Description

Replication

DEV:PORT_MODE:TX_PATH_DELAY

I/O delays

Per port

ANA:PORT:PTP_CFG.PTP_BACKPLANE_MODE

Ingress backplane configuration

Per port

DEV:PORT_MODE:RX_PATH_DELAY

I/O delays

Per port

DEV:PORT_MODE:PTP_PREDICT_CFG

I/O delays

Per port

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