VSC7511 datasheet(29/324 Pages) MICROSEMI

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Product Overview

VMDS-10488 VSC7511 Datasheet Revision 4.2

Figure 6 •

Advanced Frame Rewriting

By using the egress TCAM, ES0, much more advanced VLAN tagging operations can be achieved. ES0

enables pushing up to two VLAN tags and allows for a flexible translation of the VLAN tag header. The

key into ES0 is the combination of the ingress port, the egress port, and the classified VLAN tag header.

The PCP and DEI bits in the VLAN tag are subject to remarking based on translating the classified tag

header or by using the classified QoS value and the frame’s drop precedence level from ingress.

In addition, the DSCP value in IP frames can be updated using the classified DSCP value and the

frame’s drop precedence level from ingress. The DSCP value can be remapped at egress before writing

it into the frame.

Finally, the rewriter updates the FCS if the frame was modified before the frame is transmitted.

The egress port module controls the flow control exchange of pause frames with a neighboring device

when the interconnection link operates in full-duplex flow control mode. When the connected device

triggers flow control through transmission of a pause frame, the MAC stops the egress scheduler’s

forwarding of frames out of the port. Traffic then builds up in the queue system, but sufficient queuing is

available to ensure wire speed loss-less operation.

In half-duplex operation, the port module’s egress path responds to back pressure generation from a

connected device by collision detection and frame retransmission.

2.3.8

CPU Port Module

The CPU port module contains eight CPU extraction queues and two CPU injection queues. These

queues provide an interface for exchanging frames between the internal CPU system and the switch

core. An external CPU using the serial interface can also inject and extract frames to and from the switch

core by using the CPU port module. Any Ethernet interface on the device can also be used for extracting

and injecting frames.

The switch core can intercept a variety of different frame types and copy or redirect these to the CPU

extraction queues. The classifier can identify a set of well-known frames such as IEEE, reserved

destination MAC addresses (BPDUs, GARPs, CCM/Link trace), and IP-specific frames (IGMP, MLD).

The security TCAM, IS2, provides another very flexible way of intercepting all kinds of frames, for

instance specific OAM frames, ARP frames or explicit applications based on TCP/UDP port numbers. In

addition, frames can be intercepted based on the MAC table, the VLAN table, or the learning process.

Whenever a frame is copied or redirected to the CPU, a CPU extraction queue number is associated with

the frame and used by the CPU port module when enqueuing the frame into the 8 CPU extraction

queues. The CPU extraction queue number is programmable for every interception option in the switch

core.

2.3.9

Synchronous Ethernet and Precision Time Protocol

The device supports Layer-1 ITU-T G.8261 Synchronous Ethernet and Layer-2 IEEE 1588 Precision

Time Protocol for synchronizing network timing throughout a network.

Advanced Frame Rewriting

ES0 Egress Lookup

ES0

Classified VLAN

Ingress port

VLAN Actions:

Tagging (push/pop 0-2 tags)

Translate/overwrite VLAN

Select S-tag/C-tag

Key:

Ingress port,

Egress port,

Classified VLAN

Egress port

VLAN pop count

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