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AD9929BBCZ датащи(PDF) 14 Page - Analog Devices

номер детали AD9929BBCZ
подробное описание детали  CCD Signal Processor with Precision Timing Generator
PDF  64 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9929BBCZ датащи(HTML) 14 Page - Analog Devices

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AD9929
Rev. A | Page 14 of 64
Table 9. System Register Address Map (Address 0x14)
Register
Content
Bit
Width
Default
(Decimal)
Register Name
Register Description
Sys_Reg(0)
(31:24)
8
NA
System_Reg_addr
System Register Address is (Address 0x14)
(23:0)
24
NA
System_Number_N
Number N Register Writes (0x000000 = Write All
Registers)
Sys_Reg(1)
(31:23)
9
37
VTPLEN0
Vertical Sequence #0: Length Between Repetitions
22
1
0
XV1STARTPOL0
Vertical Sequence #0: XV1 Start Polarity
21
1
0
XV2STARTPOL0
Vertical Sequence #0: XV2 Start Polarity
20
1
1
XV3STARTPOL0
Vertical Sequence #0: XV3 Start Polarity
19
1
1
XV4STARTPOL0
Vertical Sequence #0: XV4 Start Polarity
(18:10)
9
0
XV1TOG1POS0
Vertical Sequence #0: XV1 Toggle Position 1
(9:1)
9
19
XV1TOG2POS0 Vertical
Sequence
#0: XV1 Toggle Position 2
0
1
0
XV2TOG1POS0 [8]
Sys_Reg(2)
(31:24)
8
12
XV2TOG1POS0 [7:0]
Vertical Sequence #0: XV2 Toggle Position 1
(23:15)
9
31
XV2TOG2POS0
Vertical Sequence #0: XV2 Toggle Position 2
(14:6)
9
0
XV3TOG1POS0
Vertical Sequence #0: XV3 Toggle Position 1
(5:0)
6
XV3TOG2POS0 [8:3]
Sys_Reg(3)
(31:29)
3
19
XV3TOG2POS0 [2:0]
Vertical Sequence #0: XV3 Toggle Position 2
(28:20)
9
12
XV4TOG1POS0
Vertical Sequence #0: XV4 Toggle Position 1
(19:11)
9
31
XV4TOG2POS0
Vertical Sequence #0: XV4 Toggle Position 2
(10:2)
9
104
VTPLEN1
Vertical Sequence #1: Length Between Repetitions
1
1
0
XV1STARTPOL1
Vertical Sequence #1: XV1 Start Polarity
0
1
0
XV2STARTPOL1
Vertical Sequence #1: XV2 Start Polarity
Sys_Reg(4)
31
1
1
XV3STARTPOL1
Vertical Sequence #1: XV3 Start Polarity
30
1
1
XV4STARTPOL1
Vertical Sequence #1: XV4 Start Polarity
(29:21)
9
18
XV1TOG1POS1
Vertical Sequence #1: XV1 Toggle Position 1
(20:12)
9
58
XV1TOG2POS1
Vertical Sequence #1: XV1 Toggle Position 2
(11:3)
9
47
XV2TOG1POS1
Vertical Sequence #1: XV2 Toggle Position 1
(2:0)
3
XV2TOG2POS1 [8:6]
Sys_Reg(5)
(31:26)
6
96
XV2TOG2POS1 [5:0]
Vertical Sequence #1: XV2Toggle Position 2
(25:17)
9
0
XV3TOG1POS1
Vertical Sequence #1: XV3 Toggle Position 1
(16:8)
9
76
XV3TOG2POS1
Vertical Sequence #1: XV3 Toggle Position 2
(7:0)
8
XV4TOG1POS1 [8:1]
Sys_Reg(6)
31
1
38
XV4TOG1POS1 [0]
Vertical Sequence #1: XV4 Toggle Position 1
(30:22)
9
105
XV4TOG2POS1
Vertical Sequence #1: XV4 Toggle Position 2
(21:13)
9
57
VTPLEN2
Vertical Sequence #2: Length between Repetitions
12
1
0
XV1STARTPOL2
Vertical Sequence #2: XV1 Start Polarity
11
1
0
XV2STARTPOL2
Vertical Sequence #2: XV2 Start Polarity
10
1
1
XV3STARTPOL2
Vertical Sequence #2: XV3 Start Polarity
9
1
1
XV4STARTPOL2
Vertical Sequence #2: XV4 Start Polarity
(8:0)
9
0
XV1TOG1POS2
Vertical Sequence #2: XV1 Toggle Position 1
Sys_Reg(7)
(31:23)
9
29
XV1TOG2POS2
Vertical Sequence #2: XV1 Toggle Position 2
(22:14)
9
19
XV2TOG1POS2
Vertical Sequence #2: XV2 Toggle Position 1
(13:5)
9
48
XV2TOG2POS2
Vertical Sequence #2: XV2 Toggle Position 2
(4:0)
5
XV3TOG1POS2 [8:4]
Sys_Reg(8)
(31:28)
4
0
XV3TOG1POS2 [3:0]
Vertical Sequence #2: XV3 Toggle Position 1
(27:19)
9
29
XV3TOG2POS2
Vertical Sequence #2: XV3 Toggle Position 2
(18:10)
9
19
XV4TOG1POS2
Vertical Sequence #2: XV4 Toggle Position 1
(9:1)
9
48
XV4TOG2POS2
Vertical Sequence #2: XV4 Toggle Position 2
0
1
–
Unused



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