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AD9929BBCZ датащи(PDF) 12 Page - Analog Devices

номер детали AD9929BBCZ
подробное описание детали  CCD Signal Processor with Precision Timing Generator
PDF  64 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9929BBCZ датащи(HTML) 12 Page - Analog Devices

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AD9929
Rev. A | Page 12 of 64
Address
Content
Bit
Width
Default
Value
Register Name
Register Description
0x0A
23
1
0
Unused
22
1
0
FDPOL
FD Polarity Control (0 = Low, 1 = High)
(21:16)
6
0x00
XVSGMASK
XVSG Masking (See Table 25)
(VD
(15:12)
4
0
SYNCCNT
External SYNC Setting
SyncReg)1
(11:10)
2
0
SVREP_MODE
Super Vertical Repetition Mode
9
1
0
HBLKEXT
H Pulse Blanking Extend Control
8
1
0
HPULSECNT
H Pulse Control During Blanking
(7:4)
4
C
SPATLOGIC
SPAT Logic Setting (See Table 27)
(3:2)
2
3
SVOS
Second V Output Setting (10 = Ouput Repetition 1)
1
1
0
SPAT_EN
SPAT Control (0 = SPAT Disable, 1 = SPAT Enable)
0
1
0
MODE
Mode Control Bit (0 = Mode_A, 1 = Mode_B)
0x0B
(23:22)
2
0
Unused
21
1
1
XSUBCK_EN
XSUBCK Output Enable Control (0 = Disable, 1 = Enable)
20
1
1
XVSG_EN
XVSG Output Enable Control (0 = Disable, 1 = Enable)
(VD
(19:17)
3
0
Unused
SyncReg)1
16
1
0
STROBE_EN
STROBE Output Control (0 = STROBE Output Held Low,
1 = STROBE Output Enabled)
15
1
0
Unused
(14:12)
3
0
XSUBCKNUM_HP
High Precision Shutter XSUBCLK Pulse Position/Number
11
1
0
Unused
(10:0)
11
0x7FF
XSUBCKNUM
Total Number of XSUBCKs Per Field
0x0C
(23:21)
3
0
Unused
20
1
0
MSHUTINIT
MSHUT Initialize (1 = Forces MSHUT Low)
(19:18)
2
0
Unused
(VD
17
1
0
Unused
SyncReg)1
16
1
0
MSHUTEN
MSHUT Control (0 = MSHUT Held at Last State, 1 = MSHUT Output)
15
1
0
Unused
(14:12)
3
0
MSHUTPOS_HP
MSHUT Position during High Precision Operation
11
1
0
Unused
(10:0)
11
0x000
MSHUTPOS
MSHUT Position during Normal Operation
0x0D
(23:17)
7
–
Unused
16
1
0
VSUBPOL
VSUB Active Polarity (0 = Low, 1 = High)
(VD
(15:11)
5
–
Unused
SyncReg)1
(10:0)
11
0x000
VSUBTOG
VSUB Toggle Position. Active Starting Line in any Field.
0x0E
(23:22)
2
0
Unused
(21:20)
2
0
TESTMODE1
This Register Should Always Be Set = 0.
(19:18)
2
0
Unused
(VD
17
1
0
TESTMODE2
This Register Should Always Be Set = 0.
SyncReg)1
16
1
0
TESTMODE3
This Register Should Always Be Set = 0.
(15:10)
6
0x00
Unused
(9:0)
10
0x000
VGAGAIN
VGA Gain
0x0F
(23:8)
16
0
Unused
(7:0)
8
60
XVSGLEN_1
XVSGTOG_1 Pulse Width
0x17
(23:13)
11
–
Unused
(12:0)
13
0x1FFF
XV1SPAT_TOG1
XV1SPAT Toggle Position #1 (Mode_A Active)
0x18
(23:13)
11
–
Unused
(12:0)
13
0x1FFF
XV1SPAT_TOG2
XV1SPAT Toggle Position #2 (Mode_A Active)
0x19
(23:13)
11
–
Unused
(12:0)
13
0x1FFF
XV2SPAT_TOG1
XV2SPAT Toggle Position #1 (Mode_A Active)
0x1A
(23:13)
11
–
Unused
(12:0)
13
0x1FFF
XV2SPAT_TOG2
XV2SPAT Toggle Position #2 (Mode_A active)



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