DSP56857 datasheet(206/662 Pages) FREESCALE

206 / 662 page

5685X Digital Signal Controller User Manual, Rev. 4

8-28

Freescale Semiconductor

Figure 8-16. Fast Interrupt 0 Vector Address High Register (FIVAH0)

See Programmer’s Sheet on Appendix page B - 40

8.7.12.2 Reserved—Bits 15–5

These bits are reserved or not implemented. They are read as 0, but they cannot be modified by

writing.

8.7.12.3 Fast Interrupt 0 Vector Address High—Bits 4–0

Upper five bits of Vector Address for Fast Interrupt 0.

8.7.13 Fast Interrupt 1 Vector Address Low Register (FIVAL1)

Figure 8-17. Fast Interrupt 1 Vector Address Low Register (FIVAL1)

See Programmer’s Sheet on Appendix page B - 41

8.7.13.1 Fast Interrupt 1 Vector Address Low—Bits 15–0

Lower 16 bits of Vector Address for Fast Interrupt 1

8.7.14 Fast Interrupt 1 Vector Address High Register (FIVAH1)

Figure 8-18. Fast Interrupt 1 Vector Address High Register (FIVAH1)

See Programmer’s Sheet on Appendix page B - 41

8.7.14.1 Reserved—Bits 15–5

These bits are reserved or not implemented. They are read as 0, but they cannot be modified by

writing.

Base + $C

Read

FAST INTERRUPT 0 VECTOR

ADDRESS HIGH

Write

Reset

000000

0000000

000

Base + $E

Read

FAST INTERRUPT 1 VECTOR ADDRESS LOW

Write

Reset

000000

0000000

000

Base + $F

Read

FAST INTERRUPT 1 VECTOR

ADDRESS HIGH

Write

Reset

000000

0000000

000

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