MPC7450EC datasheet(16/52 Pages) MOTOROLA

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MPC7450 RISC Microprocessor Hardware Speciﬁcations

MOTOROLA

Electrical and Thermal Characteristics

Table 9. Processor Bus AC Timing Speciﬁcations

At recommended operating conditions. See Table 4.

Parameter

Symbol2

All Speed Grades

Unit

Notes

Min

Max

Mode select input setup to HRESET

tMVRH

8—

sysclk

3, 4, 5, 6

HRESET to mode select input hold

tMXRH

—

3, 5

Input setup times:

A[0:35], AP[0:4], GBL, TBST, TSIZ[0:2], WT, CI,

D[0:63], DP[0:7]

AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3],

HRESET, INT, MCP, QACK, SMI, SRESET, TA,

TBEN, TEA, TS, EXT_QUAL, PMON_IN, SHD[0:1]

tAVKH

tIVKH

2.0

—

Input hold times:

A[0:35], AP[0:4], GBL, TBST, TSIZ[0:2], WT, CI,

D[0:63], DP[0:7]

AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3],

HRESET, INT, MCP, QACK, SMI, SRESET, TA,

TBEN, TEA, TS, EXT_QUAL, PMON_IN, SHD[0:1]

tAXKH

tIXKH

—

Output valid times:

A[0:35], AP[0:4], GBL, TBST, TSIZ[0:2], WT, CI

D[0:63], DP[0:7]

ARTRY/SHD0/SHD1

BR, CKSTP_OUT, DRDY, HIT, PMON_OUT, QREQ]

tKHAV

tKHTSV

tKHDV

tKHARV

tKHOV

—

2.5

2.8

2.5

Output hold times:

A[0:35], AP[0:4], GBL, TBST, TSIZ[0:2], WT, CI

D[0:63], DP[0:7]

ARTRY/SHD0/SHD1

BR, CKSTP_OUT, DRDY, HIT, PMON_OUT, QREQ

tKHAX

tKHTSX

tKHDX

tKHARX

tKHOX

0.5

—

SYSCLK to output enable

tKHOE

0.5

—

SYSCLK to output high impedance (all except TS, ARTRY,

SHD0, SHD1)

tKHOZ

—

3.5

SYSCLK to TS high impedance after precharge

tKHTSPZ

—1

sysclk

5, 7, 10

Maximum delay to ARTRY/SHD0/SHD1 precharge

tKHARP

—1

sysclk

5, 8,

9, 10

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

IVE

D B

Y F

INC

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