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MPC7450EC датащи(PDF) 7 Page - Motorola, Inc

номер детали MPC7450EC
подробное описание детали  Freescale Semiconductor, Inc.
PDF  52 Pages
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производитель  MOTOROLA [Motorola, Inc]
домашняя страница  http://www.freescale.com
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MPC7450EC датащи(HTML) 7 Page - Motorola, Inc

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MOTOROLA
MPC7450 RISC Microprocessor Hardware Specifications
7
Comparison with the MPC7400
The system can then disable the SYSCLK source for greater system power savings.
Power-on reset procedures for restarting and relocking the PLL must be followed on
exiting the deep sleep state.
— Thermal management facility provides software-controllable thermal management. Thermal
management is performed through the use of three supervisor-level registers and an
MPC7451-specific thermal management exception.
— Instruction cache throttling provides control of instruction fetching to limit power
consumption.
Performance monitor can be used to help debug system designs and improve software efficiency.
In-system testability and debugging features through JTAG boundary-scan capability
Testability
— LSSD scan design
— IEEE 1149.1 JTAG interface
— Array built-in self test (ABIST)—factory test only
Reliability and serviceability
— Parity checking on system bus and L3 cache bus
— Parity checking on L1, L2, and L3 cache arrays
1.3
Comparison with the MPC7400
Table 1 compares the key features of the MPC7450 with the key features of the earlier MPC7400. To achieve
a higher frequency, the number of logic levels per cycle is reduced. Also, to achieve this higher frequency,
the pipeline of the MPC7450 is extended (compared to the MPC7400), while maintaining the same level of
performance as measured by the number of instructions executed per cycle (IPC).
Table 1. Microarchitecture Comparison
Microarchitectural Specs
MPC7450
MPC7400/MPC7410
Basic Pipeline Functions
Logic Inversions per Cycle
18
28
Pipeline Stages up to Execute
5
3
Total Pipeline Stages (Minimum)
7
4
Pipeline Maximum Instruction Throughput
3 + Branch
2 + Branch
Pipeline Resources
Instruction Buffer Size
12
6
Completion Buffer Size
16
8
Renames (Integer, Float, Vector)
16, 16, 16
6, 6, 6
Maximum Execution Throughput
SFX
3
2
Vector
2 (Any 2 of 4 Units)
2 (Permute/Fixed)
Scalar Floating-Point
1
1
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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