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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8232 датащи(PDF) 41 Page - Cirrus Logic |
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WM8232 датащи(HTML) 41 Page - Cirrus Logic |
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41 / 141 page  WM8232 Rev 4.6 41 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R195 (C3h) 7:0 M1_RISE[7:0] 0000_0000 M1 pulse rise count (mask start) R196 (C4h) 6:0 M1_RISE[6:0] 000_0000 M1 pulse rise count (mask start) R197 (C5h) 7:0 M1_FALL[7:0] 0000_0000 M1 pulse fall count (mask end) R198 (C6h) 6:0 M1_FALL[6:0] 000_0000 M1 pulse fall count (mask end) R199 (C7h) 7:0 M2_RISE[7:0] 0000_0000 M2 pulse rise count (mask start) R200 (C8h) 6:0 M2_RISE[6:0] 000_0000 M2 pulse rise count (mask start) R201 (C9h) 7:0 M2_FALL[7:0] 0000_0000 M2 pulse fall count (mask end) R202 (CAh) 6:0 M2_FALL[6:0] 000_0000 M2 pulse fall count (mask end) R203 (CBh) 7:0 M3_RISE[7:0] 0000_0000 M3 pulse rise count (mask start) R204 (CCh) 6:0 M3_RISE[6:0] 000_0000 M3 pulse rise count (mask start) R205 (CDh) 7:0 M3_FALL[7:0] 0000_0000 M3 pulse fall count (mask end) R206 (CEh) 6:0 M3_FALL[6:0] 000_0000 M3 pulse fall count (mask end) R271 (010Fh) – R278 (116h) 7:0 POL*_T1 1111_1111 polarity of T1 pulse at TP* 7:0 POL*_T2 1111_1111 polarity of T2 pulse at TP* TG CYCLE MODE The TG cycle mode can set a different TG pulse line by line. This mode can only be used in slave mode. TGSYNC Cycmd [Serial I/F] Generated pulse0 High cycen_p0 cycen_p1 cycen_p2 cycen_p3 PO0 PO1 PO2 PO3 000 cyccnt 001 010 100 001 01 0 100 001 010 000 cycpat_p0[0] pixel counter 15'h7FFF No SH No pulse generation cycpat_p0[1] cycpat_p0[2] cycpat_p0[0] cycpat_p0[1] cycpat_p0[2] cycpat_p0[0] cycpat_p0[1] High High High cycpat_p1[0] cycpat_p1[1] cycpat_p1[2] cycpat_p1[0] cycpat_p1[1] cycpat_p1[2] cycpat_p1[0] cycpat_p1[1] cycpat_p2[0] cycpat_p2[1] cycpat_p2[2] cycpat_p2[0] cycpat_p2[1] cycpat_p2[2] cycpat_p2[0] cycpat_p2[1] cycpat_p3[0] cycpat_p3[1] cycpat_p3[2] cycpat_p3[0] cycpat_p3[1] cycpat_p3[2] cycpat_p3[0] cycpat_p3[1] High High High High Generated pulse1 Generated pulse2 Generated pulse3 No SH No pulse generation Figure 26 TG Cycle Mode REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R160 (A0h) 3 CYCMD 0 cycle mode enable 0 = normal (same operation at every line) 1 = cycle mode R181 (B5h) – R184 (B8h) CYCPAT_PO*[2:0] 000 PO* cycle mode control [0] = pulse enable at cycle-1 [1] = pulse enable at cycle-2 [2] = pulse enable at cycle-3 |
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