WM8232 datasheet(52/141 Pages) CIRRUS

номер детали	WM8232

подробное описание детали	105MSPS 3-Channel AFE with Sensor

PDF	141 Pages

Scroll/Zoom	100%

производитель	CIRRUS [Cirrus Logic]

домашняя страница	http://www.cirrus.com

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52 / 141 page

WM8232

Rev 4.6

PLL/DLL CONFIGURATION

PLL and DLL registers must be configured depending on the MCLK frequency and data output format.

See

“PLL DLL Setup” section for details of configuring PLL/DLL registers. The device must be reset

after PLL/DLL configuration as shown in Figure 40.

PLL/DLL configuration

0x1C[6:4]

PLL_EXDIV_SEL

0x80[5:4] DLGAIN

0x81[5:4] LVDLGAIN

0x1B0[0] USER_KEY

0x1B4[4:0] LDO2_VSEL

PLL configuration

DLL configuration

LDO configuration

(if required)

System reset

Figure 39 PLL/DLL Configuration

System reset

0x03[1] PDMD=1

0x03[0] PD=1

Power down

(Sleep mode)

0x03[1] PDMD=0

0x03[0] PD=0

Back to

Normal operation

Figure 40 System Reset

SAMPLING CONFIGURATION

Sampling configuration is the setting for input signal polarity and sampling timing. See

“CDS/Non-CDS

Processing

” section for details of configuring this register.

Non-CDS mode (S/H mode): RSMP configuration is not required.

CDS mode: RSMP and VSMP configurations are required.

0x04[6]

PGAFS

Input signal polarity

configuration

Sampling configuration

VSMP

configuration

RSMP, VSMP

configuration

0x82,0x83 RSMP_RISE, RSMP_FALL

0x84,0x85 VRMP_RISE, VSMP_FALL

0x84 VSMP_RISE

0x85 VSMP_FALL

Sampling mode

selection

0x04[0]

CDS=1

0x04[0]

CDS=0

CDS mode

Non-CDS

mode

Figure 41 Sampling Configuration

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